On 19 June 2012 08:16, Paul Berry <span dir="ltr"><<a href="mailto:stereotype441@gmail.com" target="_blank">stereotype441@gmail.com</a>></span> wrote:<br><div class="gmail_quote"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
>From the GL 3.0 spec (p.116):<br>
<br>
"Multisample rasterization is enabled or disabled by calling<br>
Enable or Disable with the symbolic constant MULTISAMPLE."<br>
<br>
Elsewhere in the spec, where multisample rasterization is described<br>
(sections 3.4.3, 3.5.4, and 3.6.6), the following text is consistently<br>
used:<br>
<br>
"If MULTISAMPLE is enabled, and the value of SAMPLE_BUFFERS is<br>
one, then..."<br>
<br>
So, in other words, disabling GL_MULTISAMPLE should prevent<br>
multisample rasterization from occurring, even if the draw framebuffer<br>
is multisampled. This patch implements that behaviour by setting the<br>
WM and SF stage's "multisample rasterization mode" to<br>
MSRAST_ON_PATTERN only when the draw framebuffer is multisampled *and*<br>
GL_MULTISAMPLE is enabled.<br></blockquote><div><br>Oh, and I forgot to say this in the commit comment:<br><br>Fixes piglit test spec/EXT_framebuffer_multisample/enable-flag.<br> </div><blockquote class="gmail_quote" style="margin:0pt 0pt 0pt 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
---<br>
src/mesa/drivers/dri/i965/gen6_sf_state.c | 10 ++++++----<br>
src/mesa/drivers/dri/i965/gen6_wm_state.c | 15 ++++++++++-----<br>
src/mesa/drivers/dri/i965/gen7_sf_state.c | 10 ++++++----<br>
src/mesa/drivers/dri/i965/gen7_wm_state.c | 15 ++++++++++-----<br>
4 files changed, 32 insertions(+), 18 deletions(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c b/src/mesa/drivers/dri/i965/gen6_sf_state.c<br>
index e0aaa90..aeed369 100644<br>
--- a/src/mesa/drivers/dri/i965/gen6_sf_state.c<br>
+++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c<br>
@@ -122,9 +122,9 @@ upload_sf_state(struct brw_context *brw)<br>
int i;<br>
/* _NEW_BUFFER */<br>
bool render_to_fbo = _mesa_is_user_fbo(brw->intel.ctx.DrawBuffer);<br>
- bool multisampled = false;<br>
+ bool multisampled_fbo = false;<br>
if (ctx->DrawBuffer->_ColorDrawBuffers[0])<br>
- multisampled = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;<br>
+ multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;<br>
<br>
int attr = 0, input_index = 0;<br>
int urb_entry_read_offset = 1;<br>
@@ -242,7 +242,8 @@ upload_sf_state(struct brw_context *brw)<br>
dw3 |= GEN6_SF_LINE_AA_MODE_TRUE;<br>
dw3 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;<br>
}<br>
- if (multisampled)<br>
+ /* _NEW_MULTISAMPLE */<br>
+ if (multisampled_fbo && ctx->Multisample.Enabled)<br>
dw3 |= GEN6_SF_MSRAST_ON_PATTERN;<br>
<br>
/* _NEW_PROGRAM | _NEW_POINT */<br>
@@ -349,7 +350,8 @@ const struct brw_tracked_state gen6_sf_state = {<br>
_NEW_LINE |<br>
_NEW_SCISSOR |<br>
_NEW_BUFFERS |<br>
- _NEW_POINT),<br>
+ _NEW_POINT |<br>
+ _NEW_MULTISAMPLE),<br>
.brw = (BRW_NEW_CONTEXT |<br>
BRW_NEW_FRAGMENT_PROGRAM),<br>
.cache = CACHE_NEW_VS_PROG<br>
diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c<br>
index cba2a57..662435e 100644<br>
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c<br>
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c<br>
@@ -98,11 +98,11 @@ upload_wm_state(struct brw_context *brw)<br>
const struct brw_fragment_program *fp =<br>
brw_fragment_program_const(brw->fragment_program);<br>
uint32_t dw2, dw4, dw5, dw6;<br>
- bool multisampled = false;<br>
+ bool multisampled_fbo = false;<br>
<br>
/* _NEW_BUFFERS */<br>
if (ctx->DrawBuffer->_ColorDrawBuffers[0])<br>
- multisampled = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;<br>
+ multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;<br>
<br>
/* CACHE_NEW_WM_PROG */<br>
if (brw->wm.prog_data->nr_params == 0) {<br>
@@ -197,8 +197,12 @@ upload_wm_state(struct brw_context *brw)<br>
<br>
dw6 |= _mesa_bitcount_64(brw->fragment_program->Base.InputsRead) <<<br>
GEN6_WM_NUM_SF_OUTPUTS_SHIFT;<br>
- if (multisampled) {<br>
- dw6 |= GEN6_WM_MSRAST_ON_PATTERN;<br>
+ if (multisampled_fbo) {<br>
+ /* _NEW_MULTISAMPLE */<br>
+ if (ctx->Multisample.Enabled)<br>
+ dw6 |= GEN6_WM_MSRAST_ON_PATTERN;<br>
+ else<br>
+ dw6 |= GEN6_WM_MSRAST_OFF_PIXEL;<br>
dw6 |= GEN6_WM_MSDISPMODE_PERPIXEL;<br>
} else {<br>
dw6 |= GEN6_WM_MSRAST_OFF_PIXEL;<br>
@@ -230,7 +234,8 @@ const struct brw_tracked_state gen6_wm_state = {<br>
_NEW_COLOR |<br>
_NEW_BUFFERS |<br>
_NEW_PROGRAM_CONSTANTS |<br>
- _NEW_POLYGON),<br>
+ _NEW_POLYGON |<br>
+ _NEW_MULTISAMPLE),<br>
.brw = (BRW_NEW_FRAGMENT_PROGRAM |<br>
BRW_NEW_BATCH),<br>
.cache = (CACHE_NEW_SAMPLER |<br>
diff --git a/src/mesa/drivers/dri/i965/gen7_sf_state.c b/src/mesa/drivers/dri/i965/gen7_sf_state.c<br>
index 8a6c09b..b1fe654 100644<br>
--- a/src/mesa/drivers/dri/i965/gen7_sf_state.c<br>
+++ b/src/mesa/drivers/dri/i965/gen7_sf_state.c<br>
@@ -161,9 +161,9 @@ upload_sf_state(struct brw_context *brw)<br>
float point_size;<br>
/* _NEW_BUFFERS */<br>
bool render_to_fbo = _mesa_is_user_fbo(brw->intel.ctx.DrawBuffer);<br>
- bool multisampled = false;<br>
+ bool multisampled_fbo = false;<br>
if (ctx->DrawBuffer->_ColorDrawBuffers[0])<br>
- multisampled = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;<br>
+ multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;<br>
<br>
dw1 = GEN6_SF_STATISTICS_ENABLE |<br>
GEN6_SF_VIEWPORT_TRANSFORM_ENABLE;<br>
@@ -261,7 +261,8 @@ upload_sf_state(struct brw_context *brw)<br>
if (ctx->Line.StippleFlag && intel->is_haswell) {<br>
dw2 |= HSW_SF_LINE_STIPPLE_ENABLE;<br>
}<br>
- if (multisampled)<br>
+ /* _NEW_MULTISAMPLE */<br>
+ if (multisampled_fbo && ctx->Multisample.Enabled)<br>
dw2 |= GEN6_SF_MSRAST_ON_PATTERN;<br>
<br>
/* FINISHME: Last Pixel Enable? Vertex Sub Pixel Precision Select?<br>
@@ -309,7 +310,8 @@ const struct brw_tracked_state gen7_sf_state = {<br>
_NEW_LINE |<br>
_NEW_SCISSOR |<br>
_NEW_BUFFERS |<br>
- _NEW_POINT),<br>
+ _NEW_POINT |<br>
+ _NEW_MULTISAMPLE),<br>
.brw = BRW_NEW_CONTEXT,<br>
.cache = CACHE_NEW_VS_PROG<br>
},<br>
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c<br>
index f46e3f2..45c8e46 100644<br>
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c<br>
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c<br>
@@ -39,12 +39,12 @@ upload_wm_state(struct brw_context *brw)<br>
const struct brw_fragment_program *fp =<br>
brw_fragment_program_const(brw->fragment_program);<br>
bool writes_depth = false;<br>
- bool multisampled = false;<br>
+ bool multisampled_fbo = false;<br>
uint32_t dw1, dw2;<br>
<br>
/* _NEW_BUFFERS */<br>
if (ctx->DrawBuffer->_ColorDrawBuffers[0])<br>
- multisampled = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;<br>
+ multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;<br>
<br>
dw1 = dw2 = 0;<br>
dw1 |= GEN7_WM_STATISTICS_ENABLE;<br>
@@ -79,8 +79,12 @@ upload_wm_state(struct brw_context *brw)<br>
dw1 & GEN7_WM_KILL_ENABLE) {<br>
dw1 |= GEN7_WM_DISPATCH_ENABLE;<br>
}<br>
- if (multisampled) {<br>
- dw1 |= GEN7_WM_MSRAST_ON_PATTERN;<br>
+ if (multisampled_fbo) {<br>
+ /* _NEW_MULTISAMPLE */<br>
+ if (ctx->Multisample.Enabled)<br>
+ dw1 |= GEN7_WM_MSRAST_ON_PATTERN;<br>
+ else<br>
+ dw1 |= GEN7_WM_MSRAST_OFF_PIXEL;<br>
dw2 |= GEN7_WM_MSDISPMODE_PERPIXEL;<br>
} else {<br>
dw1 |= GEN7_WM_MSRAST_OFF_PIXEL;<br>
@@ -97,7 +101,8 @@ upload_wm_state(struct brw_context *brw)<br>
const struct brw_tracked_state gen7_wm_state = {<br>
.dirty = {<br>
.mesa = (_NEW_LINE | _NEW_POLYGON |<br>
- _NEW_COLOR | _NEW_BUFFERS),<br>
+ _NEW_COLOR | _NEW_BUFFERS |<br>
+ _NEW_MULTISAMPLE),<br>
.brw = (BRW_NEW_FRAGMENT_PROGRAM |<br>
BRW_NEW_BATCH),<br>
.cache = CACHE_NEW_WM_PROG,<br>
<span class="HOEnZb"><font color="#888888">--<br>
1.7.7.6<br>
<br>
</font></span></blockquote></div><br>