On 24 August 2012 03:06, Kenneth Graunke <span dir="ltr"><<a href="mailto:kenneth@whitecape.org" target="_blank">kenneth@whitecape.org</a>></span> wrote:<br><div class="gmail_quote"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Currently, we mirror the VS and WM binding tables' texture entries.<br>
That may not continue to be true, so in preparation, pass in the binding<br>
table and surface index as arguments.<br>
<br>
Signed-off-by: Kenneth Graunke <<a href="mailto:kenneth@whitecape.org">kenneth@whitecape.org</a>><br>
---<br>
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c  | 24 +++++++++++++----------<br>
 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 20 +++++++++++--------<br>
 src/mesa/drivers/dri/intel/intel_context.h        |  5 ++++-<br>
 3 files changed, 30 insertions(+), 19 deletions(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c<br>
index 220af1b..0c87b84 100644<br>
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c<br>
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c<br>
@@ -654,12 +654,14 @@ brw_get_surface_num_multisamples(unsigned num_samples)<br>
<br>
<br>
 static void<br>
-brw_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit)<br>
+brw_update_buffer_texture_surface(struct gl_context *ctx,<br>
+                                  unsigned unit,<br>
+                                  uint32_t *binding_table,<br>
+                                  unsigned surf_index)<br>
 {<br>
    struct brw_context *brw = brw_context(ctx);<br>
    struct intel_context *intel = &brw->intel;<br>
    struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;<br>
-   const GLuint surf_index = SURF_INDEX_TEXTURE(unit);<br>
    uint32_t *surf;<br>
    struct intel_buffer_object *intel_obj =<br>
       intel_buffer_object(tObj->BufferObject);<br>
@@ -674,7 +676,7 @@ brw_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit)<br>
    }<br>
<br>
    surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,<br>
-                         6 * 4, 32, &brw->wm.surf_offset[surf_index]);<br>
+                         6 * 4, 32, &binding_table[surf_index]);<br>
<br>
    surf[0] = (BRW_SURFACE_BUFFER << BRW_SURFACE_TYPE_SHIFT |<br>
              (brw_format_for_mesa_format(format) << BRW_SURFACE_FORMAT_SHIFT));<br>
@@ -687,7 +689,7 @@ brw_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit)<br>
<br>
       /* Emit relocation to surface contents. */<br>
       drm_intel_bo_emit_reloc(brw-><a href="http://intel.batch.bo" target="_blank">intel.batch.bo</a>,<br>
-                             brw->wm.surf_offset[surf_index] + 4,<br>
+                             binding_table[surf_index] + 4,<br>
                              bo, 0, I915_GEM_DOMAIN_SAMPLER, 0);<br>
<br>
       int w = intel_obj->Base.Size / texel_size;<br>
@@ -706,7 +708,10 @@ brw_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit)<br>
 }<br>
<br>
 static void<br>
-brw_update_texture_surface( struct gl_context *ctx, GLuint unit )<br>
+brw_update_texture_surface(struct gl_context *ctx,<br>
+                           unsigned unit,<br>
+                           uint32_t *binding_table,<br>
+                           unsigned surf_index)<br>
 {<br>
    struct brw_context *brw = brw_context(ctx);<br>
    struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;<br>
@@ -714,19 +719,18 @@ brw_update_texture_surface( struct gl_context *ctx, GLuint unit )<br>
    struct intel_mipmap_tree *mt = intelObj->mt;<br>
    struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];<br>
    struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);<br>
-   const GLuint surf_index = SURF_INDEX_TEXTURE(unit);<br>
    uint32_t *surf;<br>
    int width, height, depth;<br>
<br>
    if (tObj->Target == GL_TEXTURE_BUFFER) {<br>
-      brw_update_buffer_texture_surface(ctx, unit);<br>
+      brw_update_buffer_texture_surface(ctx, unit, binding_table, surf_index);<br>
       return;<br>
    }<br>
<br>
    intel_miptree_get_dimensions_for_image(firstImage, &width, &height, &depth);<br>
<br>
    surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,<br>
-                         6 * 4, 32, &brw->wm.surf_offset[surf_index]);<br>
+                         6 * 4, 32, &binding_table[surf_index]);<br>
<br>
    surf[0] = (translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |<br>
              BRW_SURFACE_MIPMAPLAYOUT_BELOW << BRW_SURFACE_MIPLAYOUT_SHIFT |<br>
@@ -754,7 +758,7 @@ brw_update_texture_surface( struct gl_context *ctx, GLuint unit )<br>
<br>
    /* Emit relocation to surface contents */<br>
    drm_intel_bo_emit_reloc(brw-><a href="http://intel.batch.bo" target="_blank">intel.batch.bo</a>,<br>
-                          brw->wm.surf_offset[surf_index] + 4,<br>
+                          binding_table[surf_index] + 4,<br>
                           intelObj->mt->region->bo,<br>
                            intelObj->mt->offset,<br>
                           I915_GEM_DOMAIN_SAMPLER, 0);<br>
@@ -1242,7 +1246,7 @@ brw_update_texture_surfaces(struct brw_context *brw)<br>
<br>
       /* _NEW_TEXTURE */<br>
       if (texUnit->_ReallyEnabled) {<br>
-        brw->intel.vtbl.update_texture_surface(ctx, i);<br>
+        brw->intel.vtbl.update_texture_surface(ctx, i, brw->wm.surf_offset, surf);<br>
       } else {<br>
          brw->wm.surf_offset[surf] = 0;<br>
       }<br>
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c<br>
index e0fd390..5a7e214 100644<br>
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c<br>
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c<br>
@@ -203,11 +203,13 @@ gen7_check_surface_setup(struct gen7_surface_state *surf,<br>
<br>
<br>
 static void<br>
-gen7_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit)<br>
+gen7_update_buffer_texture_surface(struct gl_context *ctx,<br>
+                                   unsigned unit,<br>
+                                   uint32_t *binding_table,<br>
+                                   unsigned surf_index)<br>
 {<br>
    struct brw_context *brw = brw_context(ctx);<br>
    struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;<br>
-   const GLuint surf_index = SURF_INDEX_TEXTURE(unit);<br>
    struct gen7_surface_state *surf;<br>
    struct intel_buffer_object *intel_obj =<br>
       intel_buffer_object(tObj->BufferObject);<br>
@@ -216,7 +218,7 @@ gen7_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit)<br>
    int texel_size = _mesa_get_format_bytes(format);<br>
<br>
    surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,<br>
-                         sizeof(*surf), 32, &brw->wm.surf_offset[surf_index]);<br>
+                         sizeof(*surf), 32, &binding_table[surf_index]);<br>
    memset(surf, 0, sizeof(*surf));<br>
<br>
    surf->ss0.surface_type = BRW_SURFACE_BUFFER;<br></blockquote><div><br>There's a call to drm_intel_bo_emit_reloc() later in this function that it looks like you forgot to update.  brw->wm.surf_offset needs to change to binding_table:<br>
<br>      /* Emit relocation to surface contents.  Section 5.1.1 of the gen4<br>       * bspec ("Data Cache") says that the data cache does not exist as<br>       * a separate cache and is just the sampler cache.<br>
       */<br>      drm_intel_bo_emit_reloc(brw-><a href="http://intel.batch.bo">intel.batch.bo</a>,<br>                  (brw->wm.surf_offset[surf_index] +<br>                   offsetof(struct gen7_surface_state, ss1)),<br>
                  bo, 0,<br>                  I915_GEM_DOMAIN_SAMPLER, 0);<br><br>With that fixed, this patch is:<br><br>Reviewed-by: Paul Berry <<a href="mailto:stereotype441@gmail.com">stereotype441@gmail.com</a>><br>
 </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
@@ -261,7 +263,10 @@ gen7_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit)<br>
 }<br>
<br>
 static void<br>
-gen7_update_texture_surface(struct gl_context *ctx, GLuint unit)<br>
+gen7_update_texture_surface(struct gl_context *ctx,<br>
+                            unsigned unit,<br>
+                            uint32_t *binding_table,<br>
+                            unsigned surf_index)<br>
 {<br>
    struct brw_context *brw = brw_context(ctx);<br>
    struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;<br>
@@ -269,12 +274,11 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint unit)<br>
    struct intel_mipmap_tree *mt = intelObj->mt;<br>
    struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];<br>
    struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);<br>
-   const GLuint surf_index = SURF_INDEX_TEXTURE(unit);<br>
    struct gen7_surface_state *surf;<br>
    int width, height, depth;<br>
<br>
    if (tObj->Target == GL_TEXTURE_BUFFER) {<br>
-      gen7_update_buffer_texture_surface(ctx, unit);<br>
+      gen7_update_buffer_texture_surface(ctx, unit, binding_table, surf_index);<br>
       return;<br>
    }<br>
<br>
@@ -285,7 +289,7 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint unit)<br>
    intel_miptree_get_dimensions_for_image(firstImage, &width, &height, &depth);<br>
<br>
    surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,<br>
-                         sizeof(*surf), 32, &brw->wm.surf_offset[surf_index]);<br>
+                         sizeof(*surf), 32, &binding_table[surf_index]);<br>
    memset(surf, 0, sizeof(*surf));<br>
<br>
    if (mt->align_h == 4)<br>
@@ -347,7 +351,7 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint unit)<br>
<br>
    /* Emit relocation to surface contents */<br>
    drm_intel_bo_emit_reloc(brw-><a href="http://intel.batch.bo" target="_blank">intel.batch.bo</a>,<br>
-                          brw->wm.surf_offset[surf_index] +<br>
+                          binding_table[surf_index] +<br>
                           offsetof(struct gen7_surface_state, ss1),<br>
                           intelObj->mt->region->bo, intelObj->mt->offset,<br>
                           I915_GEM_DOMAIN_SAMPLER, 0);<br>
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h<br>
index 5075601..ce8cf48 100644<br>
--- a/src/mesa/drivers/dri/intel/intel_context.h<br>
+++ b/src/mesa/drivers/dri/intel/intel_context.h<br>
@@ -189,7 +189,10 @@ struct intel_context<br>
        * Surface state operations (i965+ only)<br>
        * \{<br>
        */<br>
-      void (*update_texture_surface)(struct gl_context *ctx, unsigned unit);<br>
+      void (*update_texture_surface)(struct gl_context *ctx,<br>
+                                     unsigned unit,<br>
+                                     uint32_t *binding_table,<br>
+                                     unsigned surf_index);<br>
       void (*update_renderbuffer_surface)(struct brw_context *brw,<br>
                                          struct gl_renderbuffer *rb,<br>
                                          unsigned unit);<br>
<span class="HOEnZb"><font color="#888888">--<br>
1.7.11.4<br>
<br>
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</font></span></blockquote></div><br>