<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">2013/4/11 Christian König <span dir="ltr"><<a href="mailto:deathsimple@vodafone.de" target="_blank">deathsimple@vodafone.de</a>></span><br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Am 11.04.2013 15:54, schrieb Andreas Boll:<div><div class="h5"><br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
2013/4/11 Christian König <<a href="mailto:deathsimple@vodafone.de" target="_blank">deathsimple@vodafone.de</a>><br>
<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
From: Christian König <<a href="mailto:christian.koenig@amd.com" target="_blank">christian.koenig@amd.com</a>><br>
<br>
Separated from UVD patch for clarity.<br>
<br>
v2: sync with next tree for 3.10<br>
<br>
<a href="http://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-3.10-wip" target="_blank">http://cgit.freedesktop.org/~<u></u>agd5f/linux/log/?h=drm-next-3.<u></u>10-wip</a><br>
<br>
Signed-off-by: Christian König <<a href="mailto:christian.koenig@amd.com" target="_blank">christian.koenig@amd.com</a>><br>
---<br>
src/gallium/winsys/radeon/drm/<u></u>radeon_drm_cs.c | 11 +++++++++++<br>
src/gallium/winsys/radeon/drm/<u></u>radeon_drm_winsys.c | 17 +++++++++++++++++<br>
src/gallium/winsys/radeon/drm/<u></u>radeon_winsys.h | 3 +++<br>
3 files changed, 31 insertions(+)<br>
<br>
diff --git a/src/gallium/winsys/radeon/<u></u>drm/radeon_drm_cs.c<br>
b/src/gallium/winsys/radeon/<u></u>drm/radeon_drm_cs.c<br>
index aa7e295..720e086 100644<br>
--- a/src/gallium/winsys/radeon/<u></u>drm/radeon_drm_cs.c<br>
+++ b/src/gallium/winsys/radeon/<u></u>drm/radeon_drm_cs.c<br>
@@ -94,6 +94,10 @@<br>
#define RADEON_CS_RING_DMA 2<br>
#endif<br>
<br>
+#ifndef RADEON_CS_RING_UVD<br>
+#define RADEON_CS_RING_UVD 3<br>
+#endif<br>
+<br>
#ifndef RADEON_CS_END_OF_FRAME<br>
#define RADEON_CS_END_OF_FRAME 0x04<br>
#endif<br>
@@ -490,6 +494,13 @@ static void radeon_drm_cs_flush(struct<br>
radeon_winsys_cs *rcs, unsigned flags)<br>
cs->cst->flags[0] |= RADEON_CS_USE_VM;<br>
}<br>
break;<br>
+<br>
+ case RING_UVD:<br>
+ cs->cst->flags[0] = 0;<br>
+ cs->cst->flags[1] = RADEON_CS_RING_UVD;<br>
+ cs->cst->cs.num_chunks = 3;<br>
+ break;<br>
+<br>
default:<br>
case RING_GFX:<br>
cs->cst->flags[0] = 0;<br>
diff --git a/src/gallium/winsys/radeon/<u></u>drm/radeon_drm_winsys.c<br>
b/src/gallium/winsys/radeon/<u></u>drm/radeon_drm_winsys.c<br>
index d1f7643..f32626b 100644<br>
--- a/src/gallium/winsys/radeon/<u></u>drm/radeon_drm_winsys.c<br>
+++ b/src/gallium/winsys/radeon/<u></u>drm/radeon_drm_winsys.c<br>
@@ -90,6 +90,14 @@<br>
#define RADEON_INFO_TIMESTAMP 0x11<br>
#endif<br>
<br>
+#ifndef RADEON_INFO_RING_WORKING<br>
+#define RADEON_INFO_RING_WORKING 0x15<br>
+#endif<br>
+<br>
+#ifndef RADEON_CS_RING_UVD<br>
+#define RADEON_CS_RING_UVD 3<br>
+#endif<br>
+<br>
static struct util_hash_table *fd_tab = NULL;<br>
<br>
/* Enable/disable feature access for one command stream.<br>
@@ -323,6 +331,15 @@ static boolean do_winsys_init(struct<br>
radeon_drm_winsys *ws)<br>
ws->info.r600_has_dma = TRUE;<br>
}<br>
<br>
+ /* Check for UVD */<br>
+ ws->info.has_uvd = FALSE;<br>
+ if (ws->info.drm_minor >= 31) {<br>
<br>
</blockquote>
This should be >= 32<br>
See [1]<br>
<br>
Thanks,<br>
Andreas.<br>
<br>
[1]<br>
<a href="http://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-3.10-wip&id=1bcdaf0598685592844698a4f77f66537efea139" target="_blank">http://cgit.freedesktop.org/~<u></u>agd5f/linux/commit/?h=drm-<u></u>next-3.10-wip&id=<u></u>1bcdaf0598685592844698a4f77f66<u></u>537efea139</a><br>
</blockquote>
<br></div></div>
Ah, yes indeed. Thanks, do I have your reviewed-by with that fixed?<span class="HOEnZb"><font color="#888888"><br>
<br>
Christian.</font></span><div class="HOEnZb"><div class="h5"><br></div></div></blockquote><div><br>Yes.<br><br>Looking forward to see rv770 support ;-)<br><br>Andreas.<br><br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div class="HOEnZb"><div class="h5">
<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+ uint32_t value = RADEON_CS_RING_UVD;<br>
+ if (radeon_get_drm_value(ws->fd, RADEON_INFO_RING_WORKING,<br>
+ "UVD Ring working", &value))<br>
+ ws->info.has_uvd = value;<br>
+ }<br>
+<br>
/* Get GEM info. */<br>
retval = drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_INFO,<br>
&gem_info, sizeof(gem_info));<br>
diff --git a/src/gallium/winsys/radeon/<u></u>drm/radeon_winsys.h<br>
b/src/gallium/winsys/radeon/<u></u>drm/radeon_winsys.h<br>
index 36f1f8e..e343188 100644<br>
--- a/src/gallium/winsys/radeon/<u></u>drm/radeon_winsys.h<br>
+++ b/src/gallium/winsys/radeon/<u></u>drm/radeon_winsys.h<br>
@@ -142,6 +142,7 @@ enum chip_class {<br>
enum ring_type {<br>
RING_GFX = 0,<br>
RING_DMA,<br>
+ RING_UVD,<br>
RING_LAST,<br>
};<br>
<br>
@@ -170,6 +171,8 @@ struct radeon_info {<br>
uint32_t drm_minor;<br>
uint32_t drm_patchlevel;<br>
<br>
+ boolean has_uvd;<br>
+<br>
uint32_t r300_num_gb_pipes;<br>
uint32_t r300_num_z_pipes;<br>
<br>
--<br>
1.7.9.5<br>
<br>
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</blockquote></blockquote>
<br>
</div></div></blockquote></div><br></div></div>