<div dir="ltr">On 5 June 2013 10:14, Eric Anholt <span dir="ltr"><<a href="mailto:eric@anholt.net" target="_blank">eric@anholt.net</a>></span> wrote:<br><div class="gmail_extra"><div class="gmail_quote"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
This will get reused shortly.<br>
---<br>
src/mesa/drivers/dri/intel/intel_blit.c | 70 +++++++++++++++++----------------<br>
1 file changed, 36 insertions(+), 34 deletions(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c<br>
index 1f6ad09..70d6dcc 100644<br>
--- a/src/mesa/drivers/dri/intel/intel_blit.c<br>
+++ b/src/mesa/drivers/dri/intel/intel_blit.c<br>
@@ -86,6 +86,33 @@ br13_for_cpp(int cpp)<br>
}<br>
<br>
/**<br>
+ * Emits the packet for switching the blitter from X to Y tiled or back.<br>
+ *<br>
+ * The BATCH_BEGIN_BLT must already be started, since the pairs of this<br>
+ * command emitted need to be in the same batchbuffer as the blit they're<br>
+ * wrapping (otherwise, our state might leak out into another context, since<br>
+ * BCS_SWCTRL is saved as part of the power context, not a render context).<br>
+ */<br>
+static void<br>
+set_blitter_tiling(struct intel_context *intel,<br>
+ bool dst_y_tiled, bool src_y_tiled)<br>
+{<br>
+ assert(intel->gen >= 6);<br>
+<br>
+ /* Idle the blitter before we update how tiling is interpreted. */<br>
+ OUT_BATCH(MI_FLUSH_DW);<br>
+ OUT_BATCH(0);<br>
+ OUT_BATCH(0);<br>
+ OUT_BATCH(0);<br>
+<br>
+ OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2));<br>
+ OUT_BATCH(BCS_SWCTRL);<br>
+ OUT_BATCH((BCS_SWCTRL_DST_Y | BCS_SWCTRL_SRC_Y) << 16 |<br>
+ (dst_y_tiled ? BCS_SWCTRL_DST_Y : 0) |<br>
+ (src_y_tiled ? BCS_SWCTRL_SRC_Y : 0));<br>
+}<br>
+<br>
+/**<br>
* Implements a rectangular block transfer (blit) of pixels between two<br>
* miptrees.<br>
*<br>
@@ -204,21 +231,20 @@ intelEmitCopyBlit(struct intel_context *intel,<br>
int dst_y2 = dst_y + h;<br>
int dst_x2 = dst_x + w;<br>
drm_intel_bo *aper_array[3];<br>
- uint32_t bcs_swctrl = 0;<br>
+ bool dst_y_tiled = dst_tiling == I915_TILING_Y;<br>
+ bool src_y_tiled = src_tiling == I915_TILING_Y;<br>
BATCH_LOCALS;<br>
<br>
if (dst_tiling != I915_TILING_NONE) {<br>
if (dst_offset & 4095)<br>
return false;<br>
- if (dst_tiling == I915_TILING_Y && intel->gen < 6)<br>
- return false;<br>
}<br>
if (src_tiling != I915_TILING_NONE) {<br>
if (src_offset & 4095)<br>
return false;<br>
- if (src_tiling == I915_TILING_Y && intel->gen < 6)<br>
- return false;<br>
}<br>
+ if ((dst_y_tiled || src_y_tiled) && intel->gen < 6)<br>
+ return false;<br>
<br>
/* do space check before going any further */<br>
do {<br>
@@ -284,16 +310,10 @@ intelEmitCopyBlit(struct intel_context *intel,<br>
if (dst_tiling != I915_TILING_NONE) {<br>
CMD |= XY_DST_TILED;<br>
dst_pitch /= 4;<br>
-<br>
- if (dst_tiling == I915_TILING_Y)<br>
- bcs_swctrl |= BCS_SWCTRL_DST_Y;<br>
}<br>
if (src_tiling != I915_TILING_NONE) {<br>
CMD |= XY_SRC_TILED;<br>
src_pitch /= 4;<br>
-<br>
- if (src_tiling == I915_TILING_Y)<br>
- bcs_swctrl |= BCS_SWCTRL_SRC_Y;<br>
}<br>
#endif<br>
<br>
@@ -304,20 +324,10 @@ intelEmitCopyBlit(struct intel_context *intel,<br>
assert(dst_x < dst_x2);<br>
assert(dst_y < dst_y2);<br>
<br>
- BEGIN_BATCH_BLT(8 + ((bcs_swctrl != 0) ? 14 : 0));<br>
+ BEGIN_BATCH_BLT(8 + ((dst_y_tiled || src_y_tiled) ? 14 : 0));<br></blockquote><div><br></div><div>Can we create a #define for the magic number 14? Since we're moving the OUT_BATCH() calls into set_blitter_tiling(), it's no longer obvious from reading the code where the 14 comes from. (This comment applies to patch 3/7 as well).<br>
<br></div><div>With that change, this patch is:<br><br>Reviewed-by: Paul Berry <<a href="mailto:stereotype441@gmail.com">stereotype441@gmail.com</a>><br></div> <blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
- if (bcs_swctrl != 0) {<br>
- /* Idle the blitter before we update how tiling is interpreted. */<br>
- OUT_BATCH(MI_FLUSH_DW);<br>
- OUT_BATCH(0);<br>
- OUT_BATCH(0);<br>
- OUT_BATCH(0);<br>
-<br>
- OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2));<br>
- OUT_BATCH(BCS_SWCTRL);<br>
- OUT_BATCH((BCS_SWCTRL_DST_Y | BCS_SWCTRL_SRC_Y) << 16 |<br>
- bcs_swctrl);<br>
- }<br>
+ if (dst_y_tiled || src_y_tiled)<br>
+ set_blitter_tiling(intel, dst_y_tiled, src_y_tiled);<br>
<br>
OUT_BATCH(CMD | (8 - 2));<br>
OUT_BATCH(BR13 | (uint16_t)dst_pitch);<br>
@@ -332,16 +342,8 @@ intelEmitCopyBlit(struct intel_context *intel,<br>
I915_GEM_DOMAIN_RENDER, 0,<br>
src_offset);<br>
<br>
- if (bcs_swctrl != 0) {<br>
- OUT_BATCH(MI_FLUSH_DW);<br>
- OUT_BATCH(0);<br>
- OUT_BATCH(0);<br>
- OUT_BATCH(0);<br>
-<br>
- OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2));<br>
- OUT_BATCH(BCS_SWCTRL);<br>
- OUT_BATCH((BCS_SWCTRL_DST_Y | BCS_SWCTRL_SRC_Y) << 16);<br>
- }<br>
+ if (dst_y_tiled || src_y_tiled)<br>
+ set_blitter_tiling(intel, false, false);<br>
<br>
ADVANCE_BATCH();<br>
<span class="HOEnZb"><font color="#888888"><br>
--<br>
1.8.3.rc0<br>
<br>
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</font></span></blockquote></div><br></div></div>