<div dir="ltr">On 18 June 2013 01:09, Jordan Justen <span dir="ltr"><<a href="mailto:jordan.l.justen@intel.com" target="_blank">jordan.l.justen@intel.com</a>></span> wrote:<br><div class="gmail_extra"><div class="gmail_quote">
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">When rendering to a texture with BaseLevel set, the miptree may be laid<br>
out such that BaseLevel is in level 0 of the miptree (to avoid wasting<br>
memory on unused levels between 0 and BaseLevel-1). In that case, we<br>
have to shift our render target's level down to the appropriate level of<br>
the smaller miptree.<br>
<br>
The WebGL test in combination with a meta code relating to<br>
glGenerateMipmap also triggered a similar failure scenario.<br>
<br>
This GPU hang regression was introduced by c754f7a8.<br>
<br>
Bugzilla: <a href="http://bugs.freedesktop.org/show_bug.cgi?id=65324" target="_blank">http://bugs.freedesktop.org/show_bug.cgi?id=65324</a><br>
Signed-off-by: Jordan Justen <<a href="mailto:jordan.l.justen@intel.com">jordan.l.justen@intel.com</a>><br>
Cc: Eric Anholt <<a href="mailto:eric@anholt.net">eric@anholt.net</a>><br>
Cc: Kenneth Graunke <<a href="mailto:kenneth@whitecape.org">kenneth@whitecape.org</a>><br>
Cc: Paul Berry <<a href="mailto:stereotype441@gmail.com">stereotype441@gmail.com</a>><br>
---<br>
Given all of Eric's help, this is probably more his patch than mine... :)<br>
<br>
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 2 +-<br>
1 file changed, 1 insertion(+), 1 deletion(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c<br>
index 22ceaa5..620eafe 100644<br>
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c<br>
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c<br>
@@ -595,7 +595,7 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,<br>
<br>
assert(brw->has_surface_tile_offset);<br>
<br>
- surf[5] = irb->mt_level;<br>
+ surf[5] = irb->mt_level - irb->mt->first_level;<br>
<br>
surf[2] = SET_FIELD(irb->mt->logical_width0 - 1, GEN7_SURFACE_WIDTH) |<br>
SET_FIELD(irb->mt->logical_height0 - 1, GEN7_SURFACE_HEIGHT);<br>
<span class="HOEnZb"><font color="#888888">--<br>
1.7.10.4<br>
<br>
</font></span></blockquote></div><br></div><div class="gmail_extra">How difficult would it be to make a Piglit test to validate this, preferably one that verifies that depth/stencil rendering properly accounts for first_level != 0? I want to make sure that when we make the corresponding changes to depth/stencil rendering we don't accidentally introduce the same bug.<br>
<br></div><div class="gmail_extra">In any case, this patch is:<br><br>Reviwed-by: Paul Berry <<a href="mailto:stereotype441@gmail.com">stereotype441@gmail.com</a>><br></div></div>