<div dir="ltr">On 22 August 2013 16:08, Matt Turner <span dir="ltr"><<a href="mailto:mattst88@gmail.com" target="_blank">mattst88@gmail.com</a>></span> wrote:<br><div class="gmail_extra"><div class="gmail_quote"><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
It's a ?: that operates per-component on vectors. Will be used in<br>
upcoming lowering passes for frexp and ldexp.<br></blockquote><div><br></div><div>Should we modify the boolean variants of mix() in src/glsl/builtins/ir/<a href="http://mix.ir" target="_blank">mix.ir</a> to make use of this new IR operation?<br>
</div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
---<br>
src/glsl/ir.cpp | 25 +++++++++++++++++++++++++<br>
src/glsl/ir.h | 18 ++++++++++++++++++<br>
src/glsl/ir_builder.cpp | 14 ++++++++++++++<br>
src/glsl/ir_builder.h | 2 ++<br>
src/glsl/ir_constant_expression.cpp | 8 ++++++++<br>
src/glsl/ir_validate.cpp | 7 +++++++<br>
src/mesa/program/ir_to_mesa.cpp | 1 +<br>
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 1 +<br>
8 files changed, 76 insertions(+)<br>
<br>
diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp<br>
index c8d8802..46bc608 100644<br>
--- a/src/glsl/ir.cpp<br>
+++ b/src/glsl/ir.cpp<br>
@@ -409,6 +409,30 @@ ir_expression::ir_expression(int op, ir_rvalue *op0, ir_rvalue *op1)<br>
}<br>
}<br>
<br>
+ir_expression::ir_expression(int op, ir_rvalue *op0, ir_rvalue *op1, ir_rvalue *op2)<br>
+{<br>
+ this->ir_type = ir_type_expression;<br>
+<br>
+ this->operation = ir_expression_operation(op);<br>
+ this->operands[0] = op0;<br>
+ this->operands[1] = op1;<br>
+ this->operands[2] = op2;<br>
+ this->operands[3] = NULL;<br>
+<br>
+ assert(op > ir_last_binop);<br>
+<br>
+ switch (this->operation) {<br>
+ case ir_triop_cond_sel:<br>
+ this->type = op1->type;<br>
+ break;<br>
+<br>
+ default:<br>
+ assert(!"not reached: missing automatic type setup for ir_expression");<br>
+ this->type = op0->type;<br>
+ break;<br>
+ }<br>
+}<br>
+<br>
unsigned int<br>
ir_expression::get_num_operands(ir_expression_operation op)<br>
{<br>
@@ -519,6 +543,7 @@ static const char *const operator_strs[] = {<br>
"vector_extract",<br>
"fma",<br>
"lrp",<br>
+ "cond_sel",<br>
"bfi",<br>
"bitfield_extract",<br>
"vector_insert",<br>
diff --git a/src/glsl/ir.h b/src/glsl/ir.h<br>
index df6a36d..1c55758 100644<br>
--- a/src/glsl/ir.h<br>
+++ b/src/glsl/ir.h<br>
@@ -1182,6 +1182,19 @@ enum ir_expression_operation {<br>
ir_triop_lrp,<br>
<br>
/**<br>
+ * \name Conditional Select<br>
+ *<br>
+ * A vector conditional select instruction (like ?:, but operating per-<br>
+ * component on vectors).<br>
+ *<br>
+ * \see lower_instructions_visitor::ldexp_to_arith<br>
+ * \see lower_instructions_visitor::frexp_to_arith<br>
+ */<br>
+ /*@{*/<br>
+ ir_triop_cond_sel,<br>
+ /*@}*/<br>
+<br>
+ /**<br>
* \name Second half of a lowered bitfieldInsert() operation.<br>
*<br>
* \see lower_instructions::bitfield_insert_to_bfm_bfi<br>
@@ -1237,6 +1250,11 @@ public:<br>
*/<br>
ir_expression(int op, ir_rvalue *op0, ir_rvalue *op1);<br>
<br>
+ /**<br>
+ * Constructor for ternary operation expressions<br>
+ */<br>
+ ir_expression(int op, ir_rvalue *op0, ir_rvalue *op1, ir_rvalue *op2);<br>
+<br>
virtual ir_expression *as_expression()<br>
{<br>
return this;<br>
diff --git a/src/glsl/ir_builder.cpp b/src/glsl/ir_builder.cpp<br>
index 7d9cf5e..1f05f84 100644<br>
--- a/src/glsl/ir_builder.cpp<br>
+++ b/src/glsl/ir_builder.cpp<br>
@@ -173,6 +173,14 @@ expr(ir_expression_operation op, operand a, operand b)<br>
return new(mem_ctx) ir_expression(op, a.val, b.val);<br>
}<br>
<br>
+ir_expression *<br>
+expr(ir_expression_operation op, operand a, operand b, operand c)<br>
+{<br>
+ void *mem_ctx = ralloc_parent(a.val);<br>
+<br>
+ return new(mem_ctx) ir_expression(op, a.val, b.val, c.val);<br>
+}<br>
+<br>
ir_expression *add(operand a, operand b)<br>
{<br>
return expr(ir_binop_add, a, b);<br>
@@ -381,6 +389,12 @@ b2i(operand a)<br>
return expr(ir_unop_b2i, a);<br>
}<br>
<br>
+ir_expression *<br>
+cond_sel(operand a, operand b, operand c)<br>
+{<br>
+ return expr(ir_triop_cond_sel, a, b, c);<br>
+}<br>
+<br>
ir_if*<br>
if_tree(operand condition,<br>
ir_instruction *then_branch)<br>
diff --git a/src/glsl/ir_builder.h b/src/glsl/ir_builder.h<br>
index 7049476..01f7d18 100644<br>
--- a/src/glsl/ir_builder.h<br>
+++ b/src/glsl/ir_builder.h<br>
@@ -165,6 +165,8 @@ ir_expression *u2i(operand a);<br>
ir_expression *b2i(operand a);<br>
ir_expression *i2b(operand a);<br>
<br>
+ir_expression *cond_sel(operand a, operand b, operand c);<br>
+<br>
/**<br>
* Swizzle away later components, but preserve the ordering.<br>
*/<br>
diff --git a/src/glsl/ir_constant_expression.cpp b/src/glsl/ir_constant_expression.cpp<br>
index 539e032..8beb7fc 100644<br>
--- a/src/glsl/ir_constant_expression.cpp<br>
+++ b/src/glsl/ir_constant_expression.cpp<br>
@@ -396,6 +396,7 @@ ir_expression::constant_expression_value(struct hash_table *variable_context)<br>
case ir_binop_rshift:<br>
case ir_binop_ldexp:<br>
case ir_binop_vector_extract:<br>
+ case ir_triop_cond_sel:<br>
case ir_triop_bitfield_extract:<br>
break;<br>
<br>
@@ -1398,6 +1399,13 @@ ir_expression::constant_expression_value(struct hash_table *variable_context)<br>
break;<br>
}<br>
<br>
+ case ir_triop_cond_sel:<br>
+ for (unsigned c = 0; c < components; c++) {<br>
+ data.u[c] = op[0]->value.b[c] ? op[1]->value.u[c]<br>
+ : op[2]->value.u[c];<br>
+ }<br>
+ break;<br>
+<br>
case ir_triop_vector_insert: {<br>
const unsigned idx = op[2]->value.u[0];<br>
<br>
diff --git a/src/glsl/ir_validate.cpp b/src/glsl/ir_validate.cpp<br>
index 0244519..61b5e2c 100644<br>
--- a/src/glsl/ir_validate.cpp<br>
+++ b/src/glsl/ir_validate.cpp<br>
@@ -538,6 +538,13 @@ ir_validate::visit_leave(ir_expression *ir)<br>
assert(ir->operands[2]->type == ir->operands[0]->type || ir->operands[2]->type == glsl_type::float_type);<br>
break;<br>
<br>
+ case ir_triop_cond_sel:<br>
+ assert(ir->operands[0]->type->base_type == GLSL_TYPE_BOOL);<br>
+ assert(ir->type->vector_elements == ir->operands[0]->type->vector_elements);<br>
+ assert(ir->type == ir->operands[1]->type);<br>
+ assert(ir->type == ir->operands[2]->type);<br>
+ break;<br>
+<br>
case ir_triop_bfi:<br>
assert(ir->operands[0]->type->is_integer());<br>
assert(ir->operands[1]->type == ir->operands[2]->type);<br>
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp<br>
index 4675a1e..f50e2c9 100644<br>
--- a/src/mesa/program/ir_to_mesa.cpp<br>
+++ b/src/mesa/program/ir_to_mesa.cpp<br>
@@ -1499,6 +1499,7 @@ ir_to_mesa_visitor::visit(ir_expression *ir)<br>
case ir_quadop_bitfield_insert:<br>
case ir_binop_frexp:<br>
case ir_binop_ldexp:<br>
+ case ir_triop_cond_sel:<br>
assert(!"not supported");<br>
break;<br>
<br>
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp<br>
index 4dd2cc5..88d4ab8 100644<br>
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp<br>
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp<br>
@@ -1981,6 +1981,7 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir)<br>
case ir_triop_vector_insert:<br>
case ir_binop_frexp:<br>
case ir_binop_ldexp:<br>
+ case ir_triop_cond_sel:<br>
/* This operation is not supported, or should have already been handled.<br>
*/<br>
assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");<br>
<span><font color="#888888">--<br>
1.8.3.2<br>
<br>
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</font></span></blockquote></div><br></div></div>