<div dir="ltr">On 2 December 2013 11:42, Francisco Jerez <span dir="ltr"><<a href="mailto:currojerez@riseup.net" target="_blank">currojerez@riseup.net</a>></span> wrote:<br><div class="gmail_extra"><div class="gmail_quote">
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">---<br>
 src/mesa/drivers/dri/i965/intel_batchbuffer.c | 54 ++++++++++++++++-----------<br>
 src/mesa/drivers/dri/i965/intel_batchbuffer.h |  2 +<br>
 2 files changed, 34 insertions(+), 22 deletions(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c<br>
index 25aacd9..d11de49 100644<br>
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c<br>
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c<br>
@@ -633,6 +633,30 @@ intel_emit_post_sync_nonzero_flush(struct brw_context *brw)<br>
    brw->batch.need_workaround_flush = false;<br>
 }<br>
<br>
+void<br>
+intel_batchbuffer_emit_pipe_control(struct brw_context *brw,<br>
+                                    unsigned bits)<br>
+{<br>
+   assert(brw->gen >= 6);<br></blockquote><div><br></div><div>Since this function is gen6+ only, but there exist pipe controls on previous generations, can we call it something like gen6_batchbuffer_emit_pipe_control()?<br>
<br>With that change, the patch is:<br><br>Reviewed-by: Paul Berry <<a href="mailto:stereotype441@gmail.com">stereotype441@gmail.com</a>><br></div></div></div></div>