<div dir="ltr">On Thu, Jul 24, 2014 at 8:07 PM, Alex Deucher <span dir="ltr"><<a href="mailto:alexdeucher@gmail.com" target="_blank">alexdeucher@gmail.com</a>></span> wrote:<br><div class="gmail_extra"><div class="gmail_quote">
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="">On Thu, Jul 24, 2014 at 6:28 PM, <<a href="mailto:j.glisse@gmail.com">j.glisse@gmail.com</a>> wrote:<br>
> From: Jerome Glisse <<a href="mailto:jglisse@redhat.com">jglisse@redhat.com</a>><br>
><br>
> The ucode we got for hawaii does not support 0xffff1000 special nop<br>
> packet type 3 and this leads to gpu reading invalid memory. As packet<br>
> type 2 still exist just use packet type 2.<br>
><br>
> Note this only partialy fix hawaii issues and some zbuffer tiling<br>
> issues are still present.<br>
><br>
> Changed since v1:<br>
> - use packet type 2 instead of packet 3.<br>
<br>
</div>We don't need this change if we use the updated firmware in my 3.17<br>
tree. Looks like the original hawaii CP ucode didn't support the new<br>
0xffff1000 special case NOP packet.<br>
<br></blockquote><div><br></div><div>I would rather have the nop2 packet solution than yet another is accel working. Several<br>reasons :<br></div><div> - 3.16 will be out soon and has most important fix<br></div><div> - nop2 packet can easily be backported to stable mesa<br>
</div><div> - testing for 3.16 is easy<br><br></div><div>So i think it would be cleaner to just do nop2 and 3.16.<br></div><div><br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Alex<br>
<div><div class="h5"><br>
><br>
> Signed-off-by: Jérôme Glisse <<a href="mailto:jglisse@redhat.com">jglisse@redhat.com</a>><br>
> ---<br>
> src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 9 ++-------<br>
> 1 file changed, 2 insertions(+), 7 deletions(-)<br>
><br>
> diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c<br>
> index a06ecb2..9ac7d0e 100644<br>
> --- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c<br>
> +++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c<br>
> @@ -447,13 +447,8 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs,<br>
> /* pad DMA ring to 8 DWs to meet CP fetch alignment requirements<br>
> * r6xx, requires at least 4 dw alignment to avoid a hw bug.<br>
> */<br>
> - if (cs->ws->info.chip_class <= SI) {<br>
> - while (rcs->cdw & 7)<br>
> - OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */<br>
> - } else {<br>
> - while (rcs->cdw & 7)<br>
> - OUT_CS(&cs->base, 0xffff1000); /* type3 nop packet */<br>
> - }<br>
> + while (rcs->cdw & 7)<br>
> + OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */<br>
> break;<br>
> case RING_UVD:<br>
> while (rcs->cdw & 15)<br>
> --<br>
> 1.8.3.1<br>
><br>
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</blockquote></div><br></div></div>