<div dir="ltr">Last time I was digging around in the blitter code, I came across this and meant to fix it. Didn't happen though. <div> Reviewed-but-not-tested-by: Jason Ekstrand <<a href="mailto:jason.ekstrand@intel.com">jason.ekstrand@intel.com</a>> <div><div class="gmail_extra"> <div class="gmail_quote">On Wed, Dec 10, 2014 at 8:03 PM, Ben Widawsky <<a href="mailto:benjamin.widawsky@intel.com" target="_blank">benjamin.widawsky@intel.com</a>> wrote: <blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">The odds of having this patch make a difference on Gen8+ are probably very low. Only compile tested. </blockquote><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> Signed-off-by: Ben Widawsky <<a href="mailto:ben@bwidawsk.net">ben@bwidawsk.net</a>> --- src/mesa/drivers/dri/i965/intel_blit.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index 73ab488..8d81671 100644 --- a/src/mesa/drivers/dri/i965/intel_blit.c +++ b/src/mesa/drivers/dri/i965/intel_blit.c @@ -335,7 +335,9 @@ intelEmitCopyBlit(struct brw_context *brw, if (pass >= 2) return false; - intel_batchbuffer_require_space(brw, 8 * 4, BLT_RING); + unsigned length = brw->gen >= 8 ? 10 : 8; + + intel_batchbuffer_require_space(brw, length * 4, BLT_RING); DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", __FUNCTION__, src_buffer, src_pitch, src_offset, src_x, src_y, @@ -399,8 +401,6 @@ intelEmitCopyBlit(struct brw_context *brw, assert(dst_offset + (dst_y + h - 1) * abs(dst_pitch) + (w * cpp) <= dst_buffer->size); - unsigned length = brw->gen >= 8 ? 10 : 8; - BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, src_y_tiled); OUT_BATCH(CMD | (length - 2)); OUT_BATCH(BR13 | (uint16_t)dst_pitch); @@ -467,7 +467,9 @@ intelEmitImmediateColorExpandBlit(struct brw_context *brw, __FUNCTION__, dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords); - intel_batchbuffer_require_space(brw, (8 * 4) + (3 * 4) + dwords * 4, BLT_RING); + unsigned xy_setup_blt_length = brw->gen >= 8 ? 10 : 8; + intel_batchbuffer_require_space(brw, (xy_setup_blt_length * 4) + + (3 * 4) + dwords * 4, BLT_RING); opcode = XY_SETUP_BLT_CMD; if (cpp == 4) @@ -484,8 +486,6 @@ intelEmitImmediateColorExpandBlit(struct brw_context *brw, if (dst_tiling != I915_TILING_NONE) blit_cmd |= XY_DST_TILED; - unsigned xy_setup_blt_length = brw->gen >= 8 ? 10 : 8; - BEGIN_BATCH_BLT(xy_setup_blt_length + 3); OUT_BATCH(opcode | (xy_setup_blt_length - 2)); OUT_BATCH(br13); -- 2.1.3 _______________________________________________ mesa-dev mailing list <a href="mailto:mesa-dev@lists.freedesktop.org">mesa-dev@lists.freedesktop.org</a> <a href="http://lists.freedesktop.org/mailman/listinfo/mesa-dev" target="_blank">http://lists.freedesktop.org/mailman/listinfo/mesa-dev</a> </blockquote></div> </div></div></div></div>