On Jul 13, 2015 6:04 AM, "Francisco Jerez" <<a href="mailto:currojerez@riseup.net">currojerez@riseup.net</a>> wrote: > > Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>> writes: > > > Now that the old GLSL IR visitor code is gone, having the remap is silly. > > --- > > src/mesa/drivers/dri/i965/brw_fs.h | 12 +-- > > src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 18 +--- > > src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 135 ++++++++++++++------------- > > 3 files changed, 75 insertions(+), 90 deletions(-) > > > > diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h > > index 5243079..1690f4a 100644 > > --- a/src/mesa/drivers/dri/i965/brw_fs.h > > +++ b/src/mesa/drivers/dri/i965/brw_fs.h > > @@ -109,7 +109,7 @@ public: > > void compute_clip_distance(gl_clip_plane *clip_planes); > > > > uint32_t gather_channel(int orig_chan, uint32_t sampler); > > - void swizzle_result(ir_texture_opcode op, int dest_components, > > + void swizzle_result(nir_texop op, int dest_components, > > fs_reg orig_val, uint32_t sampler); > > > > int type_size(const struct glsl_type *type); > > @@ -207,28 +207,28 @@ public: > > void compute_sample_position(fs_reg dst, fs_reg int_sample_pos); > > fs_reg rescale_texcoord(fs_reg coordinate, int coord_components, > > bool is_rect, uint32_t sampler, int texunit); > > - fs_inst *emit_texture_gen4(ir_texture_opcode op, fs_reg dst, > > + fs_inst *emit_texture_gen4(nir_texop op, fs_reg dst, > > fs_reg coordinate, int coord_components, > > fs_reg shadow_comp, > > fs_reg lod, fs_reg lod2, int grad_components, > > uint32_t sampler); > > - fs_inst *emit_texture_gen4_simd16(ir_texture_opcode op, fs_reg dst, > > + fs_inst *emit_texture_gen4_simd16(nir_texop op, fs_reg dst, > > fs_reg coordinate, int vector_elements, > > fs_reg shadow_c, fs_reg lod, > > uint32_t sampler); > > - fs_inst *emit_texture_gen5(ir_texture_opcode op, fs_reg dst, > > + fs_inst *emit_texture_gen5(nir_texop op, fs_reg dst, > > fs_reg coordinate, int coord_components, > > fs_reg shadow_comp, > > fs_reg lod, fs_reg lod2, int grad_components, > > fs_reg sample_index, uint32_t sampler, > > bool has_offset); > > - fs_inst *emit_texture_gen7(ir_texture_opcode op, fs_reg dst, > > + fs_inst *emit_texture_gen7(nir_texop op, fs_reg dst, > > fs_reg coordinate, int coord_components, > > fs_reg shadow_comp, > > fs_reg lod, fs_reg lod2, int grad_components, > > fs_reg sample_index, fs_reg mcs, fs_reg sampler, > > fs_reg offset_value); > > - void emit_texture(ir_texture_opcode op, > > + void emit_texture(nir_texop op, > > const glsl_type *dest_type, > > fs_reg coordinate, int components, > > fs_reg shadow_c, > > Hold on, I'm about to send a series that gets rid of the > ir_texture_opcode argument of these gen-specific functions and replaces > it with a backend_instruction opcode. If you wait a little this change > will involve much less churn. Fine with me. > > diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp > > index caf1300..d8a6f3c 100644 > > --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp > > +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp > > @@ -1739,23 +1739,7 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr) > > glsl_type::get_instance(dest_base_type, nir_tex_instr_dest_size(instr), > > 1); > > > > - ir_texture_opcode op; > > - switch (instr->op) { > > - case nir_texop_lod: op = ir_lod; break; > > - case nir_texop_query_levels: op = ir_query_levels; break; > > - case nir_texop_tex: op = ir_tex; break; > > - case nir_texop_tg4: op = ir_tg4; break; > > - case nir_texop_txb: op = ir_txb; break; > > - case nir_texop_txd: op = ir_txd; break; > > - case nir_texop_txf: op = ir_txf; break; > > - case nir_texop_txf_ms: op = ir_txf_ms; break; > > - case nir_texop_txl: op = ir_txl; break; > > - case nir_texop_txs: op = ir_txs; break; > > - default: > > - unreachable("unknown texture opcode"); > > - } > > - > > - emit_texture(op, dest_type, coordinate, instr->coord_components, > > + emit_texture(instr->op, dest_type, coordinate, instr->coord_components, > > shadow_comparitor, lod, lod2, lod_components, sample_index, > > tex_offset, mcs, gather_component, > > is_cube_array, is_rect, sampler, sampler_reg, texunit); > > diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp > > index 94d6a58..c726dcc 100644 > > --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp > > +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp > > @@ -78,7 +78,7 @@ fs_visitor::emit_vs_system_value(int location) > > } > > > > fs_inst * > > -fs_visitor::emit_texture_gen4(ir_texture_opcode op, fs_reg dst, > > +fs_visitor::emit_texture_gen4(nir_texop op, fs_reg dst, > > fs_reg coordinate, int coord_components, > > fs_reg shadow_c, > > fs_reg lod, fs_reg dPdy, int grad_components, > > @@ -106,13 +106,13 @@ fs_visitor::emit_texture_gen4(ir_texture_opcode op, fs_reg dst, > > } > > mlen += 3; > > > > - if (op == ir_tex) { > > + if (op == nir_texop_tex) { > > /* There's no plain shadow compare message, so we use shadow > > * compare with a bias of 0.0. > > */ > > bld.MOV(fs_reg(MRF, base_mrf + mlen), fs_reg(0.0f)); > > mlen++; > > - } else if (op == ir_txb || op == ir_txl) { > > + } else if (op == nir_texop_txb || op == nir_texop_txl) { > > bld.MOV(fs_reg(MRF, base_mrf + mlen), lod); > > mlen++; > > } else { > > @@ -121,7 +121,7 @@ fs_visitor::emit_texture_gen4(ir_texture_opcode op, fs_reg dst, > > > > bld.MOV(fs_reg(MRF, base_mrf + mlen), shadow_c); > > mlen++; > > - } else if (op == ir_tex) { > > + } else if (op == nir_texop_tex) { > > for (int i = 0; i < coord_components; i++) { > > bld.MOV(fs_reg(MRF, base_mrf + mlen + i), coordinate); > > coordinate = offset(coordinate, bld, 1); > > @@ -132,7 +132,7 @@ fs_visitor::emit_texture_gen4(ir_texture_opcode op, fs_reg dst, > > } > > /* gen4's SIMD8 sampler always has the slots for u,v,r present. */ > > mlen += 3; > > - } else if (op == ir_txd) { > > + } else if (op == nir_texop_txd) { > > fs_reg &dPdx = lod; > > > > for (int i = 0; i < coord_components; i++) { > > @@ -167,7 +167,7 @@ fs_visitor::emit_texture_gen4(ir_texture_opcode op, fs_reg dst, > > dPdy = offset(dPdy, bld, 1); > > } > > mlen += MAX2(grad_components, 2); > > - } else if (op == ir_txs) { > > + } else if (op == nir_texop_txs) { > > /* There's no SIMD8 resinfo message on Gen4. Use SIMD16 instead. */ > > simd16 = true; > > bld.MOV(fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_UD), lod); > > @@ -177,7 +177,7 @@ fs_visitor::emit_texture_gen4(ir_texture_opcode op, fs_reg dst, > > * instructions. We'll need to do SIMD16 here. > > */ > > simd16 = true; > > - assert(op == ir_txb || op == ir_txl || op == ir_txf); > > + assert(op == nir_texop_txb || op == nir_texop_txl || op == nir_texop_txf); > > > > for (int i = 0; i < coord_components; i++) { > > bld.MOV(fs_reg(MRF, base_mrf + mlen + i * 2, coordinate.type), > > @@ -213,12 +213,12 @@ fs_visitor::emit_texture_gen4(ir_texture_opcode op, fs_reg dst, > > > > enum opcode opcode; > > switch (op) { > > - case ir_tex: opcode = SHADER_OPCODE_TEX; break; > > - case ir_txb: opcode = FS_OPCODE_TXB; break; > > - case ir_txl: opcode = SHADER_OPCODE_TXL; break; > > - case ir_txd: opcode = SHADER_OPCODE_TXD; break; > > - case ir_txs: opcode = SHADER_OPCODE_TXS; break; > > - case ir_txf: opcode = SHADER_OPCODE_TXF; break; > > + case nir_texop_tex: opcode = SHADER_OPCODE_TEX; break; > > + case nir_texop_txb: opcode = FS_OPCODE_TXB; break; > > + case nir_texop_txl: opcode = SHADER_OPCODE_TXL; break; > > + case nir_texop_txd: opcode = SHADER_OPCODE_TXD; break; > > + case nir_texop_txs: opcode = SHADER_OPCODE_TXS; break; > > + case nir_texop_txf: opcode = SHADER_OPCODE_TXF; break; > > default: > > unreachable("not reached"); > > } > > @@ -241,18 +241,19 @@ fs_visitor::emit_texture_gen4(ir_texture_opcode op, fs_reg dst, > > } > > > > fs_inst * > > -fs_visitor::emit_texture_gen4_simd16(ir_texture_opcode op, fs_reg dst, > > +fs_visitor::emit_texture_gen4_simd16(nir_texop op, fs_reg dst, > > fs_reg coordinate, int vector_elements, > > fs_reg shadow_c, fs_reg lod, > > uint32_t sampler) > > { > > fs_reg message(MRF, 2, BRW_REGISTER_TYPE_F); > > - bool has_lod = op == ir_txl || op == ir_txb || op == ir_txf || op == ir_txs; > > + bool has_lod = op == nir_texop_txl || op == nir_texop_txb || > > + op == nir_texop_txf || op == nir_texop_txs; > > > > if (has_lod && shadow_c.file != BAD_FILE) > > no16("TXB and TXL with shadow comparison unsupported in SIMD16."); > > > > - if (op == ir_txd) > > + if (op == nir_texop_txd) > > no16("textureGrad unsupported in SIMD16."); > > > > /* Copy the coordinates. */ > > @@ -272,7 +273,7 @@ fs_visitor::emit_texture_gen4_simd16(ir_texture_opcode op, fs_reg dst, > > } > > > > if (has_lod) { > > - fs_reg msg_lod = retype(msg_end, op == ir_txf ? > > + fs_reg msg_lod = retype(msg_end, op == nir_texop_txf ? > > BRW_REGISTER_TYPE_UD : BRW_REGISTER_TYPE_F); > > bld.MOV(msg_lod, lod); > > msg_end = offset(msg_lod, bld, 1); > > @@ -286,12 +287,12 @@ fs_visitor::emit_texture_gen4_simd16(ir_texture_opcode op, fs_reg dst, > > > > enum opcode opcode; > > switch (op) { > > - case ir_tex: opcode = SHADER_OPCODE_TEX; break; > > - case ir_txb: opcode = FS_OPCODE_TXB; break; > > - case ir_txd: opcode = SHADER_OPCODE_TXD; break; > > - case ir_txl: opcode = SHADER_OPCODE_TXL; break; > > - case ir_txs: opcode = SHADER_OPCODE_TXS; break; > > - case ir_txf: opcode = SHADER_OPCODE_TXF; break; > > + case nir_texop_tex: opcode = SHADER_OPCODE_TEX; break; > > + case nir_texop_txb: opcode = FS_OPCODE_TXB; break; > > + case nir_texop_txd: opcode = SHADER_OPCODE_TXD; break; > > + case nir_texop_txl: opcode = SHADER_OPCODE_TXL; break; > > + case nir_texop_txs: opcode = SHADER_OPCODE_TXS; break; > > + case nir_texop_txf: opcode = SHADER_OPCODE_TXF; break; > > default: unreachable("not reached"); > > } > > > > @@ -313,7 +314,7 @@ fs_visitor::emit_texture_gen4_simd16(ir_texture_opcode op, fs_reg dst, > > * surprising in the disassembly. > > */ > > fs_inst * > > -fs_visitor::emit_texture_gen5(ir_texture_opcode op, fs_reg dst, > > +fs_visitor::emit_texture_gen5(nir_texop op, fs_reg dst, > > fs_reg coordinate, int vector_elements, > > fs_reg shadow_c, > > fs_reg lod, fs_reg lod2, int grad_components, > > @@ -350,22 +351,22 @@ fs_visitor::emit_texture_gen5(ir_texture_opcode op, fs_reg dst, > > > > enum opcode opcode; > > switch (op) { > > - case ir_tex: > > + case nir_texop_tex: > > opcode = SHADER_OPCODE_TEX; > > break; > > - case ir_txb: > > + case nir_texop_txb: > > bld.MOV(msg_lod, lod); > > msg_end = offset(msg_lod, bld, 1); > > > > opcode = FS_OPCODE_TXB; > > break; > > - case ir_txl: > > + case nir_texop_txl: > > bld.MOV(msg_lod, lod); > > msg_end = offset(msg_lod, bld, 1); > > > > opcode = SHADER_OPCODE_TXL; > > break; > > - case ir_txd: { > > + case nir_texop_txd: { > > /** > > * P = u, v, r > > * dPdx = dudx, dvdx, drdx > > @@ -389,28 +390,28 @@ fs_visitor::emit_texture_gen5(ir_texture_opcode op, fs_reg dst, > > opcode = SHADER_OPCODE_TXD; > > break; > > } > > - case ir_txs: > > + case nir_texop_txs: > > msg_lod = retype(msg_end, BRW_REGISTER_TYPE_UD); > > bld.MOV(msg_lod, lod); > > msg_end = offset(msg_lod, bld, 1); > > > > opcode = SHADER_OPCODE_TXS; > > break; > > - case ir_query_levels: > > + case nir_texop_query_levels: > > msg_lod = msg_end; > > bld.MOV(retype(msg_lod, BRW_REGISTER_TYPE_UD), fs_reg(0u)); > > msg_end = offset(msg_lod, bld, 1); > > > > opcode = SHADER_OPCODE_TXS; > > break; > > - case ir_txf: > > + case nir_texop_txf: > > msg_lod = offset(msg_coords, bld, 3); > > bld.MOV(retype(msg_lod, BRW_REGISTER_TYPE_UD), lod); > > msg_end = offset(msg_lod, bld, 1); > > > > opcode = SHADER_OPCODE_TXF; > > break; > > - case ir_txf_ms: > > + case nir_texop_txf_ms: > > msg_lod = offset(msg_coords, bld, 3); > > /* lod */ > > bld.MOV(retype(msg_lod, BRW_REGISTER_TYPE_UD), fs_reg(0u)); > > @@ -420,10 +421,10 @@ fs_visitor::emit_texture_gen5(ir_texture_opcode op, fs_reg dst, > > > > opcode = SHADER_OPCODE_TXF_CMS; > > break; > > - case ir_lod: > > + case nir_texop_lod: > > opcode = SHADER_OPCODE_LOD; > > break; > > - case ir_tg4: > > + case nir_texop_tg4: > > opcode = SHADER_OPCODE_TG4; > > break; > > default: > > @@ -454,7 +455,7 @@ is_high_sampler(const struct brw_device_info *devinfo, fs_reg sampler) > > } > > > > fs_inst * > > -fs_visitor::emit_texture_gen7(ir_texture_opcode op, fs_reg dst, > > +fs_visitor::emit_texture_gen7(nir_texop op, fs_reg dst, > > fs_reg coordinate, int coord_components, > > fs_reg shadow_c, > > fs_reg lod, fs_reg lod2, int grad_components, > > @@ -470,7 +471,7 @@ fs_visitor::emit_texture_gen7(ir_texture_opcode op, fs_reg dst, > > } > > int length = 0; > > > > - if (op == ir_tg4 || offset_value.file != BAD_FILE || > > + if (op == nir_texop_tg4 || offset_value.file != BAD_FILE || > > is_high_sampler(devinfo, sampler)) { > > /* For general texture offsets (no txf workaround), we need a header to > > * put them in. Note that for SIMD16 we're making space for two actual > > @@ -497,28 +498,28 @@ fs_visitor::emit_texture_gen7(ir_texture_opcode op, fs_reg dst, > > bool coordinate_done = false; > > > > /* The sampler can only meaningfully compute LOD for fragment shader > > - * messages. For all other stages, we change the opcode to ir_txl and > > - * hardcode the LOD to 0. > > + * messages. For all other stages, we change the opcode to nir_texop_txl > > + * and hardcode the LOD to 0. > > */ > > - if (stage != MESA_SHADER_FRAGMENT && op == ir_tex) { > > - op = ir_txl; > > + if (stage != MESA_SHADER_FRAGMENT && op == nir_texop_tex) { > > + op = nir_texop_txl; > > lod = fs_reg(0.0f); > > } > > > > /* Set up the LOD info */ > > switch (op) { > > - case ir_tex: > > - case ir_lod: > > + case nir_texop_tex: > > + case nir_texop_lod: > > break; > > - case ir_txb: > > + case nir_texop_txb: > > bld.MOV(sources[length], lod); > > length++; > > break; > > - case ir_txl: > > + case nir_texop_txl: > > bld.MOV(sources[length], lod); > > length++; > > break; > > - case ir_txd: { > > + case nir_texop_txd: { > > no16("Gen7 does not support sample_d/sample_d_c in SIMD16 mode."); > > > > /* Load dPdx and the coordinate together: > > @@ -546,15 +547,15 @@ fs_visitor::emit_texture_gen7(ir_texture_opcode op, fs_reg dst, > > coordinate_done = true; > > break; > > } > > - case ir_txs: > > + case nir_texop_txs: > > bld.MOV(retype(sources[length], BRW_REGISTER_TYPE_UD), lod); > > length++; > > break; > > - case ir_query_levels: > > + case nir_texop_query_levels: > > bld.MOV(retype(sources[length], BRW_REGISTER_TYPE_UD), fs_reg(0u)); > > length++; > > break; > > - case ir_txf: > > + case nir_texop_txf: > > /* Unfortunately, the parameters for LD are intermixed: u, lod, v, r. > > * On Gen9 they are u, v, lod, r > > */ > > @@ -582,7 +583,7 @@ fs_visitor::emit_texture_gen7(ir_texture_opcode op, fs_reg dst, > > > > coordinate_done = true; > > break; > > - case ir_txf_ms: > > + case nir_texop_txf_ms: > > bld.MOV(retype(sources[length], BRW_REGISTER_TYPE_UD), sample_index); > > length++; > > > > @@ -601,7 +602,7 @@ fs_visitor::emit_texture_gen7(ir_texture_opcode op, fs_reg dst, > > > > coordinate_done = true; > > break; > > - case ir_tg4: > > + case nir_texop_tg4: > > if (has_nonconstant_offset) { > > if (shadow_c.file != BAD_FILE) > > no16("Gen7 does not support gather4_po_c in SIMD16 mode."); > > @@ -652,16 +653,16 @@ fs_visitor::emit_texture_gen7(ir_texture_opcode op, fs_reg dst, > > /* Generate the SEND */ > > enum opcode opcode; > > switch (op) { > > - case ir_tex: opcode = SHADER_OPCODE_TEX; break; > > - case ir_txb: opcode = FS_OPCODE_TXB; break; > > - case ir_txl: opcode = SHADER_OPCODE_TXL; break; > > - case ir_txd: opcode = SHADER_OPCODE_TXD; break; > > - case ir_txf: opcode = SHADER_OPCODE_TXF; break; > > - case ir_txf_ms: opcode = SHADER_OPCODE_TXF_CMS; break; > > - case ir_txs: opcode = SHADER_OPCODE_TXS; break; > > - case ir_query_levels: opcode = SHADER_OPCODE_TXS; break; > > - case ir_lod: opcode = SHADER_OPCODE_LOD; break; > > - case ir_tg4: > > + case nir_texop_tex: opcode = SHADER_OPCODE_TEX; break; > > + case nir_texop_txb: opcode = FS_OPCODE_TXB; break; > > + case nir_texop_txl: opcode = SHADER_OPCODE_TXL; break; > > + case nir_texop_txd: opcode = SHADER_OPCODE_TXD; break; > > + case nir_texop_txf: opcode = SHADER_OPCODE_TXF; break; > > + case nir_texop_txf_ms: opcode = SHADER_OPCODE_TXF_CMS; break; > > + case nir_texop_txs: opcode = SHADER_OPCODE_TXS; break; > > + case nir_texop_query_levels: opcode = SHADER_OPCODE_TXS; break; > > + case nir_texop_lod: opcode = SHADER_OPCODE_LOD; break; > > + case nir_texop_tg4: > > if (has_nonconstant_offset) > > opcode = SHADER_OPCODE_TG4_OFFSET; > > else > > @@ -826,7 +827,7 @@ fs_visitor::emit_mcs_fetch(fs_reg coordinate, int components, fs_reg sampler) > > } > > > > void > > -fs_visitor::emit_texture(ir_texture_opcode op, > > +fs_visitor::emit_texture(nir_texop op, > > const glsl_type *dest_type, > > fs_reg coordinate, int coord_components, > > fs_reg shadow_c, > > @@ -842,7 +843,7 @@ fs_visitor::emit_texture(ir_texture_opcode op, > > { > > fs_inst *inst = NULL; > > > > - if (op == ir_tg4) { > > + if (op == nir_texop_tg4) { > > /* When tg4 is used with the degenerate ZERO/ONE swizzles, don't bother > > * emitting anything other than setting up the constant result. > > */ > > @@ -898,7 +899,7 @@ fs_visitor::emit_texture(ir_texture_opcode op, > > if (offset_value.file == IMM) > > inst->offset = offset_value.fixed_hw_reg.dw1.ud; > > > > - if (op == ir_tg4) { > > + if (op == nir_texop_tg4) { > > inst->offset |= > > gather_channel(gather_component, sampler) << 16; /* M0.2:16-17 */ > > > > @@ -907,7 +908,7 @@ fs_visitor::emit_texture(ir_texture_opcode op, > > } > > > > /* fixup #layers for cube map arrays */ > > - if (op == ir_txs && is_cube_array) { > > + if (op == nir_texop_txs && is_cube_array) { > > fs_reg depth = offset(dst, bld, 2); > > fs_reg fixed_depth = vgrf(glsl_type::int_type); > > bld.emit(SHADER_OPCODE_INT_QUOTIENT, fixed_depth, depth, fs_reg(6)); > > @@ -985,10 +986,10 @@ fs_visitor::gather_channel(int orig_chan, uint32_t sampler) > > * EXT_texture_swizzle as well as DEPTH_TEXTURE_MODE for shadow comparisons. > > */ > > void > > -fs_visitor::swizzle_result(ir_texture_opcode op, int dest_components, > > +fs_visitor::swizzle_result(nir_texop op, int dest_components, > > fs_reg orig_val, uint32_t sampler) > > { > > - if (op == ir_query_levels) { > > + if (op == nir_texop_query_levels) { > > /* # levels is in .w */ > > this->result = offset(orig_val, bld, 3); > > return; > > @@ -999,7 +1000,7 @@ fs_visitor::swizzle_result(ir_texture_opcode op, int dest_components, > > /* txs,lod don't actually sample the texture, so swizzling the result > > * makes no sense. > > */ > > - if (op == ir_txs || op == ir_lod || op == ir_tg4) > > + if (op == nir_texop_txs || op == nir_texop_lod || op == nir_texop_tg4) > > return; > > > > if (dest_components == 1) { > > -- > > 2.4.3 > > > > _______________________________________________ > > mesa-dev mailing list > > <a href="mailto:mesa-dev@lists.freedesktop.org">mesa-dev@lists.freedesktop.org</a> > > <a href="http://lists.freedesktop.org/mailman/listinfo/mesa-dev">http://lists.freedesktop.org/mailman/listinfo/mesa-dev</a>