<p dir="ltr"><br>
On Sep 20, 2015 11:11 AM, "Matt Turner" <<a href="mailto:mattst88@gmail.com">mattst88@gmail.com</a>> wrote:<br>
><br>
> On Sun, Sep 20, 2015 at 8:48 AM, Antia Puentes <<a href="mailto:apuentes@igalia.com">apuentes@igalia.com</a>> wrote:<br>
> > Math operations in SandyBridge do not support source swizzling<br>
><br>
> I can't find any documentation to support this claim, but I remember<br>
> that SNB math must be in align1 mode so it can't do swizzles or<br>
> writemasking (see commit e14cc504).</p>
<p dir="ltr">Probably my fault. I replied to the bug with a hunch and zero research. She was quoting me.</p>
<p dir="ltr">> But, the documentation actually says "The supported regioning modes<br>
> for math instruction are align16, align1 with the following<br>
> restrictions: ..."<br>
><br>
> Would be nice if we could actually find a PRM citation.</p>
<p dir="ltr">Agreed</p>
<p dir="ltr">--Jason</p>
<p dir="ltr">> > Bugzilla: <a href="https://bugs.freedesktop.org/show_bug.cgi?id=92033">https://bugs.freedesktop.org/show_bug.cgi?id=92033</a><br>
> > ---<br>
> > src/mesa/drivers/dri/i965/brw_ir_vec4.h | 3 ++-<br>
> > src/mesa/drivers/dri/i965/brw_vec4.cpp | 11 +++++++++--<br>
> > 2 files changed, 11 insertions(+), 3 deletions(-)<br>
> ><br>
> > diff --git a/src/mesa/drivers/dri/i965/brw_ir_vec4.h b/src/mesa/drivers/dri/i965/brw_ir_vec4.h<br>
> > index 966a410..a48bb68 100644<br>
> > --- a/src/mesa/drivers/dri/i965/brw_ir_vec4.h<br>
> > +++ b/src/mesa/drivers/dri/i965/brw_ir_vec4.h<br>
> > @@ -175,7 +175,8 @@ public:<br>
> ><br>
> > bool is_send_from_grf();<br>
> > unsigned regs_read(unsigned arg) const;<br>
> > - bool can_reswizzle(int dst_writemask, int swizzle, int swizzle_mask);<br>
> > + bool can_reswizzle(const struct brw_device_info *devinfo, int dst_writemask,<br>
> > + int swizzle, int swizzle_mask);<br>
> > void reswizzle(int dst_writemask, int swizzle);<br>
> > bool can_do_source_mods(const struct brw_device_info *devinfo);<br>
> ><br>
> > diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp<br>
> > index ed49cd3..d7192e4 100644<br>
> > --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp<br>
> > +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp<br>
> > @@ -941,10 +941,17 @@ vec4_visitor::opt_set_dependency_control()<br>
> > }<br>
> ><br>
> > bool<br>
> > -vec4_instruction::can_reswizzle(int dst_writemask,<br>
> > +vec4_instruction::can_reswizzle(const struct brw_device_info *devinfo,<br>
> > + int dst_writemask,<br>
> > int swizzle,<br>
> > int swizzle_mask)<br>
> > {<br>
> > +<br>
><br>
> Extra new line.<br>
><br>
> > + /* gen6 math instructions can not manage source swizzles */<br>
><br>
> If we can find documentation, we should update this comment. If not,<br>
> let's change it to read<br>
><br>
> /* Gen6 MATH instructions can not execute in align16 mode, so swizzles<br>
> are not allowed. */<br>
><br>
> (linewrapped as appropriate)<br>
><br>
> With those changes,<br>
><br>
> Reviewed-by: Matt Turner <<a href="mailto:mattst88@gmail.com">mattst88@gmail.com</a>><br>
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</p>