<p dir="ltr"><br>
On Nov 18, 2015 6:38 PM, "Ian Romanick" <<a href="mailto:idr@freedesktop.org">idr@freedesktop.org</a>> wrote:<br>
><br>
> From: Ian Romanick <<a href="mailto:ian.d.romanick@intel.com">ian.d.romanick@intel.com</a>><br>
><br>
> v2: Handle immediate value for MCS smarter. Rebase on changes to<br>
> nir_texop_sampels_identical (missing second parameter). Suggested by<br>
> Jason. This still doesn't handle the 16x MSAA case.</p>
<p dir="ltr">We could always just enable it on IVB-BDW for now.</p>
<p dir="ltr">The last three are</p>
<p dir="ltr">Reviewed-by: Jason Ekstrand <<a href="mailto:jason.ekstrand@intel.com">jason.ekstrand@intel.com</a>></p>
<p dir="ltr">> Signed-off-by: Ian Romanick <<a href="mailto:ian.d.romanick@intel.com">ian.d.romanick@intel.com</a>><br>
> ---<br>
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 4 +++-<br>
> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 16 ++++++++++++++++<br>
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 4 +++-<br>
> src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 11 +++++++++++<br>
> src/mesa/drivers/dri/i965/intel_extensions.c | 1 +<br>
> 5 files changed, 34 insertions(+), 2 deletions(-)<br>
><br>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp<br>
> index 80315fe..c85c9fc 100644<br>
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp<br>
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp<br>
> @@ -2624,6 +2624,7 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)<br>
> switch (instr->op) {<br>
> case nir_texop_txf:<br>
> case nir_texop_txf_ms:<br>
> + case nir_texop_samples_identical:<br>
> coordinate = retype(src, BRW_REGISTER_TYPE_D);<br>
> break;<br>
> default:<br>
> @@ -2686,7 +2687,8 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)<br>
> }<br>
> }<br>
><br>
> - if (instr->op == nir_texop_txf_ms) {<br>
> + if (instr->op == nir_texop_txf_ms ||<br>
> + instr->op == nir_texop_samples_identical) {<br>
> if (devinfo->gen >= 7 &&<br>
> key_tex->compressed_multisample_layout_mask & (1 << sampler)) {<br>
> mcs = emit_mcs_fetch(coordinate, instr->coord_components, sampler_reg);<br>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp<br>
> index a7bd9ce..66cbbd2 100644<br>
> --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp<br>
> +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp<br>
> @@ -259,6 +259,22 @@ fs_visitor::emit_texture(ir_texture_opcode op,<br>
> lod = fs_reg(0u);<br>
> }<br>
><br>
> + if (op == ir_samples_identical) {<br>
> + fs_reg dst = vgrf(glsl_type::get_instance(dest_type->base_type, 1, 1));<br>
> +<br>
> + /* If mcs is an immediate value, it means there is no MCS. In that case<br>
> + * just return false.<br>
> + */<br>
> + if (mcs.file == BRW_IMMEDIATE_VALUE) {<br>
> + bld.MOV(dst, fs_reg(0));<br>
> + } else {<br>
> + bld.CMP(dst, mcs, src_reg(0u), BRW_CONDITIONAL_EQ);<br>
> + }<br>
> +<br>
> + this->result = dst;<br>
> + return;<br>
> + }<br>
> +<br>
> if (coordinate.file != BAD_FILE) {<br>
> /* FINISHME: Texture coordinate rescaling doesn't work with non-constant<br>
> * samplers. This should only be a problem with GL_CLAMP on Gen7.<br>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp<br>
> index c93227c..98a4d3b 100644<br>
> --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp<br>
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp<br>
> @@ -1615,6 +1615,7 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr)<br>
> switch (instr->op) {<br>
> case nir_texop_txf:<br>
> case nir_texop_txf_ms:<br>
> + case nir_texop_samples_identical:<br>
> coordinate = get_nir_src(instr->src[i].src, BRW_REGISTER_TYPE_D,<br>
> src_size);<br>
> coord_type = glsl_type::ivec(src_size);<br>
> @@ -1695,7 +1696,8 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr)<br>
> }<br>
> }<br>
><br>
> - if (instr->op == nir_texop_txf_ms) {<br>
> + if (instr->op == nir_texop_txf_ms ||<br>
> + instr->op == nir_texop_samples_identical) {<br>
> assert(coord_type != NULL);<br>
> if (devinfo->gen >= 7 &&<br>
> key_tex->compressed_multisample_layout_mask & (1 << sampler)) {<br>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp<br>
> index fda3d7c..d8a0f22 100644<br>
> --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp<br>
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp<br>
> @@ -909,6 +909,17 @@ vec4_visitor::emit_texture(ir_texture_opcode op,<br>
> unreachable("TXB is not valid for vertex shaders.");<br>
> case ir_lod:<br>
> unreachable("LOD is not valid for vertex shaders.");<br>
> + case ir_samples_identical: {<br>
> + /* If mcs is an immediate value, it means there is no MCS. In that case<br>
> + * just return false.<br>
> + */<br>
> + if (mcs.file == BRW_IMMEDIATE_VALUE) {<br>
> + emit(MOV(dest, src_reg(0u)));<br>
> + } else {<br>
> + emit(CMP(dest, mcs, src_reg(0u), BRW_CONDITIONAL_EQ));<br>
> + }<br>
> + return;<br>
> + }<br>
> default:<br>
> unreachable("Unrecognized tex op");<br>
> }<br>
> diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c<br>
> index 386b63c..2e2459c 100644<br>
> --- a/src/mesa/drivers/dri/i965/intel_extensions.c<br>
> +++ b/src/mesa/drivers/dri/i965/intel_extensions.c<br>
> @@ -333,6 +333,7 @@ intelInitExtensions(struct gl_context *ctx)<br>
> ctx->Extensions.ARB_texture_compression_bptc = true;<br>
> ctx->Extensions.ARB_texture_view = true;<br>
> ctx->Extensions.ARB_shader_storage_buffer_object = true;<br>
> + ctx->Extensions.EXT_shader_samples_identical = true;<br>
><br>
> if (can_do_pipelined_register_writes(brw)) {<br>
> ctx->Extensions.ARB_draw_indirect = true;<br>
> --<br>
> 2.1.0<br>
><br>
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</p>