<p dir="ltr"><br>
On Dec 9, 2015 4:16 AM, "Iago Toral Quiroga" <<a href="mailto:itoral@igalia.com">itoral@igalia.com</a>> wrote:<br>
><br>
> This code in brw_set_dest adjusts the execution size of any instruction<br>
> with a dst.width < 8. However, we don't want to do this with instructions<br>
> operating on doubles, since these will have a width of 4, but still<br>
> need an execution size of 8 (for SIMD8). Unfortunately, we can't just check<br>
> the size of the operands involved to detect if we are doing an operation on<br>
> doubles, because we can have instructions that do operations on double<br>
> operands interpreted as UD, operating on any of its 2 32-bit components.<br>
><br>
> Previous commits have made it so we never emit instructions with a horizontal<br>
> width of 4 that don't have the correct execution size set for gen7/gen8, so<br>
> we can skip it in this case, avoiding the conflicts with fp64 requirements.<br>
><br>
> Expanding the same fix to other hardware generations requires many more<br>
> changes but since we are not targetting fp64 support on them<br>
> wer don't really care for now.<br>
> ---<br>
> src/mesa/drivers/dri/i965/brw_eu_emit.c | 14 +++++++++++++-<br>
> 1 file changed, 13 insertions(+), 1 deletion(-)<br>
><br>
> diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c<br>
> index 78f2c8c..50a8771 100644<br>
> --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c<br>
> +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c<br>
> @@ -202,8 +202,20 @@ brw_set_dest(struct brw_codegen *p, brw_inst *inst, struct brw_reg dest)<br>
> /* Generators should set a default exec_size of either 8 (SIMD4x2 or SIMD8)<br>
> * or 16 (SIMD16), as that's normally correct. However, when dealing with<br>
> * small registers, we automatically reduce it to match the register size.<br>
> + *<br>
> + * In platforms that support fp64 we can emit instructions with a width of<br>
> + * 4 that need two SIMD8 registers and an exec_size of 8 or 16. In these<br>
> + * cases we need to make sure that these instructions have their exec sizes<br>
> + * set properly when they are emitted and we can't rely on this code to fix<br>
> + * it.<br>
> */<br>
> - if (dest.width < BRW_EXECUTE_8)<br>
> + bool fix_exec_size;<br>
> + if (devinfo->gen == 7 || devinfo->gen == 8)</p>
<p dir="ltr">If we're doing to take this approach, we definitely want to make it gen > 6 or something so we include future gens. Really gen > 4 is probably doable since the only real problem is the legacy clipping code.</p>
<p dir="ltr">> + fix_exec_size = dest.width < BRW_EXECUTE_4;<br>
> + else<br>
> + fix_exec_size = dest.width < BRW_EXECUTE_8;<br>
> +<br>
> + if (fix_exec_size)<br>
> brw_inst_set_exec_size(devinfo, inst, dest.width);<br>
> }<br>
><br>
> --<br>
> 2.1.4<br>
><br>
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</p>