<html> <head> <base href="https://bugs.freedesktop.org/" /> </head> <body> <div> <a class="bz_bug_link bz_status_RESOLVED bz_closed" title="RESOLVED NOTABUG - Performance improvement : Please consider hardware ɢᴘᴜ rendering in llvmpipe" href="https://bugs.freedesktop.org/show_bug.cgi?id=93686#c13">Comment # 13</a> on <a class="bz_bug_link bz_status_RESOLVED bz_closed" title="RESOLVED NOTABUG - Performance improvement : Please consider hardware ɢᴘᴜ rendering in llvmpipe" href="https://bugs.freedesktop.org/show_bug.cgi?id=93686">bug 93686</a> from <a class="email" href="mailto:alexdeucher@gmail.com" title="Alex Deucher <alexdeucher@gmail.com>"> Alex Deucher</a> <pre>(In reply to ytrezq from <a href="show_bug.cgi?id=93686#c10">comment #10</a>) > (In reply to Jan Vesely from <a href="show_bug.cgi?id=93686#c9">comment #9</a>) > > If GPU<->CPU synchronization is the only problem then the idea should work > > for iGPUs with coherent access to main memory (HSA complaint?). Then again > > those GPUs probably won't need CPU help any time soon. > > Intel or ᴀᴍᴅ ᴀᴘᴜs can’t (theoretically) do memory sharing between ᴄᴘᴜ ᴀɴᴅ > ɢᴘᴜ. > Intel or ᴀᴍᴅ ᴀᴘᴜs use ᴘᴄɪe even if they are on the same die of the ᴄᴘᴜ. The > ʙɪᴏꜱ or the ᴜᴇꜰɪ firmware allocate a fixed portion of ʀᴀᴍ that appear as > part of “hardware reserved memory” to the ᴏꜱ. > There’s no Unified memory, data has to use the internal ᴘᴄɪe bus. It’s the > same as if the card was an external one with it’s own memory (though it can > directly address ᴄᴘᴜ ram modules). > I can't speak for intel, but on AMD APUs, while the GPU appears as a device on the PCIE bus, it actually has a much faster internal connection to the memory controller.</pre> </div> <hr> You are receiving this mail because: <ul> <li>You are the QA Contact for the bug.</li> <li>You are the assignee for the bug.</li> </ul> </body> </html>