<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Jan 19, 2016 at 12:57 PM, Matt Turner <span dir="ltr"><<a href="mailto:mattst88@gmail.com" target="_blank">mattst88@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="HOEnZb"><div class="h5">On Sat, Jan 16, 2016 at 7:31 PM, Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>> wrote:<br>
><br>
> On Jan 16, 2016 5:56 PM, "Matt Turner" <<a href="mailto:mattst88@gmail.com">mattst88@gmail.com</a>> wrote:<br>
>><br>
>> On Thu, Jan 14, 2016 at 12:27 PM, Matt Turner <<a href="mailto:mattst88@gmail.com">mattst88@gmail.com</a>> wrote:<br>
>> > On Thu, Jan 14, 2016 at 12:08 PM, Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>><br>
>> > wrote:<br>
>> >> BDW adds the following restriction: "When multiplying DW x DW, the dst<br>
>> >> cannot be accumulator."<br>
>> >> ---<br>
>> >> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 6 +++++-<br>
>> >> 1 file changed, 5 insertions(+), 1 deletion(-)<br>
>> >><br>
>> >> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp<br>
>> >> b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp<br>
>> >> index c228743..b2335bd 100644<br>
>> >> --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp<br>
>> >> +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp<br>
>> >> @@ -1069,7 +1069,11 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)<br>
>> >> case nir_op_umul_high: {<br>
>> >> struct brw_reg acc = retype(brw_acc_reg(8), dst.type);<br>
>> >><br>
>> >> - emit(MUL(acc, op[0], op[1]));<br>
>> >> + if (devinfo->gen >=8)<br>
>> ><br>
>> > Space after >=<br>
>> ><br>
>> >> + emit(MUL(acc, op[0], retype(op[1], BRW_REGISTER_TYPE_UW)));<br>
>> >> + else<br>
>> >> + emit(MUL(acc, op[0], op[1]));<br>
>> >> +<br>
>> ><br>
>> > Do the<br>
>> > tests/spec/arb_gpu_shader5/execution/built-in-functions/vs-{i,u}mulExtended*.shader_test<br>
>> > tests currently fail on BDW with INTEL_DEBUG=vec4? If so, presumably<br>
>> > this fixes it?<br>
><br>
> It didn't fix anything<br>
<br>
</div></div>That's an aggravatingly ambiguous answer. Did it not fix anything<br>
because all the tests already passed, or did it not fix anything<br>
because the tests still fail?<br>
<br>
I pulled out my Broadwell to test for myself:<br>
<br>
First column is 0a68112~, second is 0a68112~ using INTEL_DEBUG=vec4,<br>
third is 0a68112 using INTEL_DEBUG=vec4.<br>
<br>
vs-imulextended: pass fail pass<br>
vs-imulextended-nonuniform: pass fail pass<br>
vs-imulextended-only-msb: pass fail pass<br>
vs-imulextended-only-msb-nonuniform: pass fail pass<br>
vs-umulextended: pass fail pass<br>
vs-umulextended-nonuniform: pass fail pass<br>
vs-umulextended-only-msb: pass fail pass<br>
vs-umulextended-only-msb-nonuniform: pass fail pass<br>
<br>
So the tests I asked you to run did fail without this patch and were<br>
fixed by this patch.<br></blockquote><div><br></div><div>Ok, I see what's going on. We have no GS variants of those tests on BDW so of course Jenkins didn't give me a difference thanks to SIMD8 VS. Sorry for the confusion; I wasn't paying enough attention.<br></div><div>--Jason<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
For completeness, after those tests were fixed by this patch, the only<br>
remaining regressions from INTEL_DEBUG=vec4 on BDW are<br>
spec/arb_shader_draw_parameters/drawid-{indirect-baseinstance,basevertex,vertexid}.<br>
</blockquote></div><br></div></div>