[Mesa-stable] [PATCH 1/3] i965/gen6: Set need_workaround_flush after each primitive

[Chad Versace]

Set brw->need_workaround_flush immediately after each 3D_CMD_PRIM. This
may prevent undiscovered difficult-to-diagnose gpu hangs, according to
Ken.

The art of emitting workaround flushes on Sandybridge is mysterious and
not fully understood. Ken's intuition says that
intel_emit_post_sync_nonzero_flush() is required after each 3D_CMD_PRIM.

On gen6, there are two places where we emit 3D_CMD_PRIM: brw_emit_prim()
and gen6_blorp_emit_primitive(). The former already sets
need_workaround_flush, so this patch needs only to change the latter.

There is no need to set need_workaround_flush in
gen7_blorp_emit_primitive() because the workaround applies only to gen6.

CC: mesa-stable at lists.freedesktop.org
CC: Kenneth Graunke <kenneth at whitecape.org>
CC: Paul Berry <stereotype441 at gmail.com>
CC: Stéphane Marchesin <marcheu at chromium.org>
Signed-off-by: Chad Versace <chad.versace at linux.intel.com>
---
 src/mesa/drivers/dri/i965/gen6_blorp.cpp | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index 441d61f..929d7b5 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -1010,6 +1010,9 @@ gen6_blorp_emit_primitive(struct brw_context *brw,
    OUT_BATCH(0);
    OUT_BATCH(0);
    ADVANCE_BATCH();
+
+   /* Only used on Sandybridge; harmless to set elsewhere. */
+   brw->batch.need_workaround_flush = true;
 }
 
 static void
-- 
1.8.5.2