[Openchrome-devel] [PATCH] Add basic VX855 support to Openchrome
Xavier Bachelot
xavier
Wed May 20 14:32:38 PDT 2009
Harald Welte wrote:
> [PATCH] Add basic VX855 support to Openchrome
>
> This patch adds support for the new VX855 chipset. It makes
> Openchrome treat VX855 almost the same way like a VX800. The big
> difference is the PLL configuration, which is once again different
> for this generation of hardware.
>
> Signed-off-by: Harald Welte <HaraldWelte at viatech.com>
>
Thanks Harald.
Here are a few comments, after comparing against a similar patch I
started sometime ago. I hope my comments are making sense.
> Index: trunk/src/via_mode.h
> ===================================================================
> --- trunk/src/via_mode.h (revision 747)
> +++ trunk/src/via_mode.h (working copy)
> @@ -44,49 +44,55 @@
> int DotClock;
> CARD16 UniChrome;
> CARD32 UniChromePro;
> + CARD32 Chrome9HC;
Isn't the VX855 Chrome9HCM ?
Chrome9HC is the P4M900, iirc, and P4M900 is using the unichromePro
dotclock table.
> } ViaDotClocks[] = {
> { 25200, 0x513C, 0xa79004 },
> { 25312, 0xC763, 0xc49005 },
> { 26591, 0x471A, 0xce9005 },
> - { 31500, 0xC558, 0xae9003 },
> + { 31500, 0xC558, 0xae9003, 0xb01005 },
> { 31704, 0x471F, 0xaf9002 },
> { 32663, 0xC449, 0x479000 },
> - { 33750, 0x4721, 0x959002 },
> + { 33750, 0x4721, 0x959002, 0x921004 },
> { 35500, 0x5877, 0x759001 },
> - { 36000, 0x5879, 0x9f9002 },
> + { 36000, 0x5879, 0x9f9002, 0xa11004 },
> { 39822, 0xC459, 0x578c02 },
> - { 40000, 0x515F, 0x848c04 },
> + { 40000, 0x515F, 0x848c04, 0x700c05 },
> { 41164, 0x4417, 0x2c8c00 },
> - { 46981, 0x5069, 0x678c02 },
> - { 49500, 0xC353, 0xa48c04 },
> + { 46981, 0x5069, 0x678c02, 0x690c04 },
> + { 49500, 0xC353, 0xa48c04, 0x530c03 },
> { 50000, 0xC354, 0x368c00 },
> - { 56300, 0x4F76, 0x3d8c00 },
> + { 56300, 0x4F76, 0x3d8c00, 0x9d0c05 },
> { 57284, 0x4E70, 0x3e8c00 },
> - { 64995, 0x0D3B, 0x6b8c01 },
> - { 65000, 0x0D3B, 0x6b8c01 }, /* Slightly unstable on PM800 */
> + { 64995, 0x0D3B, 0x6b8c01, 0x6d0c03 },
> + { 65000, 0x0D3B, 0x6b8c01, 0x6d0c03 }, /* Slightly unstable on PM800 */
> { 65028, 0x866D, 0x6b8c01 },
> - { 74480, 0x156E, 0x288800 },
> + { 74480, 0x156E, 0x288800, 0xd10c05 },
> { 75000, 0x156E, 0x288800 },
> - { 78800, 0x442C, 0x2a8800 },
> + { 78800, 0x442C, 0x2a8800, 0x6e0805 },
> { 81135, 0x0622, 0x428801 },
> - { 81613, 0x4539, 0x708803 },
> - { 94500, 0x4542, 0x4d8801 },
> - { 108000, 0x0B53, 0x778802 },
> + { 81613, 0x4539, 0x708803, 0x720805 },
> + { 94500, 0x4542, 0x4d8801, 0x840805 },
> + { 108000, 0x0B53, 0x778802, 0x970805 },
> { 108280, 0x4879, 0x778802 },
> { 122000, 0x0D6F, 0x428800 },
> - { 122726, 0x073C, 0x878802 },
> - { 135000, 0x0742, 0x6f8801 },
> - { 148500, 0x0853, 0x518800 },
> + { 122726, 0x073C, 0x878802, 0xac0805 },
> + { 135000, 0x0742, 0x6f8801, 0xbd0805},
> + { 148500, 0x0853, 0x518800, 0xd00805},
> { 155800, 0x0857, 0x558402 },
> - { 157500, 0x422C, 0x2a8400 },
> + { 157500, 0x422C, 0x2a8400, 0x6e0405 },
> { 161793, 0x4571, 0x6f8403 },
> - { 162000, 0x0A71, 0x6f8403 },
> + { 162000, 0x0A71, 0x6f8403, 0x710405 },
> { 175500, 0x4231, 0x2f8400 },
> { 189000, 0x0542, 0x4d8401 },
> - { 202500, 0x0763, 0x6F8402 },
> + { 202500, 0x0763, 0x6F8402, 0x8e0405 },
> { 204800, 0x0764, 0x548401 },
> - { 218300, 0x043D, 0x3b8400 },
> - { 229500, 0x0660, 0x3e8400 }, /* Not tested on Pro */
> + { 218300, 0x043D, 0x3b8400, 0x990405 },
> + { 229500, 0x0660, 0x3e8400, 0xa10405 }, /* Not tested on Pro */
> + { 234000, 0, 0xa20403, 0xa40405 },
> + { 267250, 0, 0xb90403, 0xbb0405 },
> + { 297500, 0, 0xce0403, 0xd00405 },
> + { 339500, 0, 0x5d0002, 0x770005 },
> + { 340772, 0, 0x750003, 0x770005 },
> { 0, 0, 0 }
> };
>
> Index: trunk/src/via_bandwidth.c
> ===================================================================
> --- trunk/src/via_bandwidth.c (revision 747)
> +++ trunk/src/via_bandwidth.c (working copy)
> @@ -239,6 +239,7 @@
> hwp->writeSeq(hwp, 0x22, 0x1F);
> break;
> case VIA_VX800:
> + case VIA_VX855:
> hwp->writeSeq(hwp, 0x16, 0x26); /* 152/4 = 38 */
> hwp->writeSeq(hwp, 0x17, 0x5F); /* 192/2-1 = 95 */
> hwp->writeSeq(hwp, 0x18, 0x26); /* 152/4 = 38 */
Are you sure this is right ? According to what is in viafb and the
values you defined in src/via.h below, it should be something like that :
case VIA_VX855:
hwp->writeSeq(hwp, 0x16, 0x50); /* 320/4 = 80 */
hwp->writeSeq(hwp, 0x17, 0xC7); /* 400/2-1 = 199 */
hwp->writeSeq(hwp, 0x18, 0x50); /* 320/4 = 80 */
hwp->writeSeq(hwp, 0x22, 0x28); /* 160/4 = 40 */
> @@ -396,6 +397,7 @@
> ViaCrtcMask(hwp, 0x94, 0x20, 0x7F);
> break;
> case VIA_VX800:
> + case VIA_VX855:
> /* {CR68,4,7},{CR94,7,7},{CR95,7,7} : 96/8-1 = 0x0B */
> ViaCrtcMask(hwp, 0x68, 0xA0, 0xF0);
> ViaCrtcMask(hwp, 0x94, 0x00, 0x80);
If I'm right for the above, then this is probably wrong too.
> Index: trunk/src/via.h
> ===================================================================
> --- trunk/src/via.h (revision 747)
> +++ trunk/src/via.h (working copy)
> @@ -327,6 +327,12 @@
> #define VIDEO_FIFO_PRETHRESHOLD_VT3336 250
> #define VIDEO_EXPIRE_NUM_VT3336 31
>
> +/* Those values are only valid for IGA1 */
> +#define VIDEO_FIFO_DEPTH_VT3409 400
> +#define VIDEO_FIFO_THRESHOLD_VT3409 320
> +#define VIDEO_FIFO_PRETHRESHOLD_VT3409 230
> +#define VIDEO_EXPIRE_NUM_VT3409 160
> +
> /* ALPHA_V3_FIFO_CONTROL 0x278
> * IA2 has 32 level FIFO for packet mode video format
> * 32 level FIFO for planar mode video YV12. with extension reg 230 bit 21 enable
src/via_driver.c lacks an entry in the libpciaccess case, around line 128 :
VIA_DEVICE_MATCH (PCI_CHIP_VT3409, 0 ),
Also, still in the same file the condition is reverted.
Index: trunk/src/via_driver.c
===================================================================
--- trunk/src/via_driver.c (revision 747)
+++ trunk/src/via_driver.c (working copy)
@@ -2996,9 +3026,14 @@
viaAccelSync(pScrn);
/* A soft reset avoids a 3D hang after X restart. */
- if (pVia->Chipset != VIA_K8M890 && pVia->Chipset != VIA_P4M900 &&
- pVia->Chipset != VIA_VX800)
- hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
+ switch (pVia->Chipset) {
+ case VIA_K8M890:
+ case VIA_P4M900:
+ case VIA_VX800:
+ case VIA_VX855:
+ hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
+ break;
+ }
if (!pVia->IsSecondary) {
/* Turn off all video activities. */
In src/via_swov.c, around line 1271, PCI_CHIP_VT3409 is missing.
In srv/via_accel.c, around line 1292, pVia->Chipset != VIA_VX855 is missing.
In src/via_xvmc.c, around line 322, pVia->Chipset == VIA_VX855 is missing.
Regards,
Xavier
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