[Openchrome-devel] xf86-video-openchrome: 2 commits - configure.ac src/via_tmds.c

[Kevin Brace]

 configure.ac   |    2 +-
 src/via_tmds.c |   20 +++++++++++++-------
 2 files changed, 14 insertions(+), 8 deletions(-)

New commits:
commit 3d97f4b7ac3cc5991d796b46be6756fa92109fd6
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Jul 3 16:21:42 2017 -0500

    Version bumped to 0.6.147
    
    This version fixes an intermittent DVI power on failure bug when
    resuming from standby (ACPI S3 State) on models that use the
    integrated TMDS transmitter found in CX700 / VX700 and VX800 chipsets.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/configure.ac b/configure.ac
index 6905051..7c40151 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
 # Initialize Autoconf
 AC_PREREQ(2.57)
 AC_INIT([xf86-video-openchrome],
-        [0.6.146],
+        [0.6.147],
         [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome],
         [xf86-video-openchrome])
 
commit f067bea48f1973abf8bd4b5ce82cb4dd46ad38ba
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Jul 3 16:16:52 2017 -0500

    Disabling various FP related registers when DVI is in use
    
    After further testing, it turns out that VX700 chipset’s hardware
    based FP power on circuit fails about half of the time when resuming
    from standby (ACPI S3 State) on Xubuntu 14.04‘s X.Org X Server 1.15.1.
    Code will now use software based power on control instead. This fixes
    an intermittent DVI power on failure bug.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/src/via_tmds.c b/src/via_tmds.c
index 147c61c..219fda0 100644
--- a/src/via_tmds.c
+++ b/src/via_tmds.c
@@ -107,7 +107,18 @@ viaTMDSInitReg(ScrnInfoPtr pScrn)
     DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                         "Entered viaTMDSInitReg.\n"));
 
+    /* Turn off hardware controlled FP power on / off circuit. */
+    viaFPSetPrimaryHardPower(pScrn, FALSE);
+
+    /* Use software FP power sequence control. */
+    viaFPSetPrimaryPowerSeqType(pScrn, FALSE);
+
+    /* Turn off software controlled primary FP (LVDS1) power rails. */
+    viaFPSetPrimarySoftVDD(pScrn, FALSE);
     viaFPSetPrimarySoftData(pScrn, FALSE);
+    viaFPSetPrimarySoftVEE(pScrn, FALSE);
+    viaFPSetPrimarySoftBackLight(pScrn, FALSE);
+    viaFPSetPrimaryDirectBackLightCtrl(pScrn, FALSE);
 
     /* Activate DVI + LVDS2 mode. */
     /* 3X5.D2[5:4] - Display Channel Select
@@ -164,17 +175,12 @@ viaTMDSPower(ScrnInfoPtr pScrn, Bool powerState)
     DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                         "Entered viaTMDSPower.\n"));
 
-    /* Use hardware FP power sequence control. */
-    viaFPSetPrimaryPowerSeqType(pScrn, TRUE);
-
     if (powerState) {
-        viaFPSetPrimaryHardPower(pScrn, TRUE);
-        viaTMDSSetPower(pScrn, TRUE);
         viaFPSetPrimaryDirectDisplayPeriod(pScrn, TRUE);
+        viaTMDSSetPower(pScrn, TRUE);
     } else {
-        viaFPSetPrimaryDirectDisplayPeriod(pScrn, FALSE);
         viaTMDSSetPower(pScrn, FALSE);
-        viaFPSetPrimaryHardPower(pScrn, FALSE);
+        viaFPSetPrimaryDirectDisplayPeriod(pScrn, FALSE);
     }
 
     xf86DrvMsg(pScrn->scrnIndex, X_INFO,