[ANNOUNCE] xf86-video-intel 2.1.0

Eric Anholt eric.anholt at intel.com
Tue Jul 3 00:49:27 PDT 2007

Alan Coopersmith (2):
      Add AM_PROG_CC_C_O to configure.ac
      Add *~ to .gitignore to skip emacs & patch backup files

Carl Worth (7):
      Remove redundant i830WaitSync from i965_prepare_composite
      Use local structure for cc_state
      Use local structure for dest_surf_state
      Use local structure for src_surf_state
      Use local structure for mask_surf_state
      Use local structure for src_sampler_state and mask_sampler_state
      Use local structures for vs_state, sf_state, and wm_state

Dave Airlie (3):
      disable all outputs on EnterVT
      i810: be a bit more verbose about disabling DRI
      sdvo: add support for RGB outputs on SDVO

Dave Mueller (1):
      Bug #11171: Add support for the Ti TFP410 DVO TMDS transmitter.

Eric Anholt (28):
      Disable some clock gating functions documented to work incorrectly.
      Allow physical-memory allocations within stolen memory.
      Ignore VideoRam now that its original purpose is obsolete.
      Fix typo in previous commit with s/XF86_DRI/XF86DRI/
      Make the DVO output name LVDS if it's an LVDS chip.
      Add DVO[ABC] register debugging.
      Disable non-working GTT decoding on i830, and fix map/unmap of GTT.
      Make up a fixed panel timing for DVO LVDS, and use DVOA for DVO LVDS.
      Fix typo s/i/index/ in LoadPalette for depth 16.
      Disable vblank interrupts when no DRI clients are running.
      Disable vblank interrupts when no DRI clients are running.
      Add a fixup to LVDS panel mode detection for 1280x768 panel from text mode.
      Expand manpage description of outputs supported.
      Remove README statement that 830M panels are unsupported.
      Fix misplaced merge of 1280x768 panel fixup.
      Clean up some nits in i915_video.c setup.
      Fix a typo in _3DSTATE_DEPTH_SUBRECT_DISABLE definition.
      Replace failure-prone configure test for fresh libdrm with a simple ifndef.
      Fix context switching between DRI and X.
      On hang, dump up to the head pointer, not just up to the tail.
      Revert "Replace failure-prone configure test for fresh libdrm with a simple ifndef."
      Improve the drm_i915_flip_t check.
      Fix and enable the 915-class planar textured video path.
      Bug #11295: Disable textured video on i915 with framebuffer width too large.
      Move the ivch's fixed panel mode support to i830_dvo.c for other LVDS drivers.
      Bug #11365: Disable the panel fitter unless it's needed for the chosen mode.
      Fix reversed LVDS dither enabling logic on GM965.
      Update documentation and bump driver version to 2.1.0.

Keith Packard (32):
      CRTC Rotation under XAA wasn't hitting accelerated path.
      Deal with i830 CRT load detection which cannot use FORCE_BORDER.
      Add i830_bios_get_aim_data_block to read AIM data from BIOS
      Change DVO module interface to pass more state across. Fix IVCH display.
      Enable panel fitter on ivch DVO.
      Make each output control clones/crtcs. Split DVO into LVDS, TMDS, TV.
      Dump pending ring on crash.
      Use CRTCs instead of pipe indices for video pipe selection.
      Automatically select crtc based on coverage.
      Use FLIP_CONTINUE with ~OVERLAY_ENABLE to turn overlay off.
      Clean up overlay management.
      Reformat i830_video.c to four-space indents.
      Eliminate blocking for video overlay.
      Clean up CRTC selection. Remove more overlay blocking.
      Xv does not require directRendering
      Ensure Pipe A is active when enabling overlay the first time.
      Compute and clip to crtc before call to xf86XVClipVideoHelper.
      On i830, Pipe B cannot be lit the first time unless Pipe A is running.
      Mark IVCH as connected when detected
      Extend XV_PIPE range to include new -1 value
      Automatically switch overlay when crtcs are reconfigured.
      Always ensure the pipe A is lit when activating overlay on pipe B.
      Add description for how to use the frame and pixel counter registers.
      Let DPMS functions enable plane/pipe/output on 8xx hardware.
      Eliminate some uninitialized variable warnings
      Follow BIOS configuration for Legacy Backlight Brightness.
      Increase vblank wait timeout from 20ms to 30ms. 49.6Hz < 20ms.
      I830 needs to have plane/pipe/pll started in mode_set.
      Decode PLL registers in LVDS mode a bit better in debug code.
      Handle dual-channel LVDS on i855.
      Fix load detection to use border region instead of blanking.

Kristian Høgsberg (1):
      Implement the custom I2C protocol used by the ivch DVO.

Michel Dänzer (2):
      Update vblank pipes when a pipe gets disabled.
      i830: Provide new DRI texOffsetStart hook when available with EXA.

Rémi Cardona (1):
      Include stdint.h to get uint64_t

Samuel Thibault (1):
      Bug #10714: Fix build without DRI.

Wang Zhenyu (13):
      EXA: set enabling bits properly for i830
      Alloc state mem buffer on 965G for xaa rotation
      EXA: remove a flush cmd in i915 render code
      Fix ring debug code
      EXA: add render enter helper function
      Fix i965 render's draw clip rectangle
      Add pci ids for 965GME/GLE chip
      Add pci ids for 945GME
      Add support for the G33, Q33, and Q35 chipsets.
      Enable overlay on G33 class chipsets
      Fix left G33 issues
      EXA: don't have to check offscreen size
      EXA: fallback mask transform on i965

git tag: xf86-video-intel-2.1.0

SHA1 (xf86-video-intel-2.1.0.tar.bz2) = 007412d72428e2dbc067a5d6fa00fbcfcc9c99c4
MD5 (xf86-video-intel-2.1.0.tar.bz2) = a564a1fbb7ed9fcbcf81e15aedc92578

SHA1 (xf86-video-intel-2.1.0.tar.gz) = ce5af5ea005e3eb6ee22eedef5198bba16af4e01
MD5 (xf86-video-intel-2.1.0.tar.gz) = 5c63092d34c666616cd7465102017d77

Eric Anholt                             anholt at FreeBSD.org
eric at anholt.net                         eric.anholt at intel.com

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