xf86-video-ati: Branch 'master' - 2 commits
Alex Deucher
agd5f at kemper.freedesktop.org
Mon Nov 30 08:11:45 PST 2009
src/r600_exa.c | 6 ++++--
src/radeon_atombios.c | 23 +++++++++++++++++++++++
src/radeon_modes.c | 2 +-
3 files changed, 28 insertions(+), 3 deletions(-)
New commits:
commit b2597deea3a3953ff50d54ff37e3c043eac409f4
Author: Kusanagi Kouichi <slash at ac.auone-net.jp>
Date: Mon Nov 30 11:10:50 2009 -0500
R600: fix some warnings
diff --git a/src/r600_exa.c b/src/r600_exa.c
index 174037d..16d217d 100644
--- a/src/r600_exa.c
+++ b/src/r600_exa.c
@@ -625,7 +625,6 @@ R600PrepareCopy(PixmapPtr pSrc, PixmapPtr pDst,
ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
RADEONInfoPtr info = RADEONPTR(pScrn);
struct radeon_accel_state *accel_state = info->accel_state;
- int ret;
if (!R600CheckBPP(pSrc->drawable.bitsPerPixel))
RADEON_FALLBACK(("R600CheckDatatype src failed\n"));
@@ -677,6 +676,8 @@ R600PrepareCopy(PixmapPtr pSrc, PixmapPtr pDst,
#if defined(XF86DRM_MODE)
if (info->cs) {
+ int ret;
+
radeon_cs_space_reset_bos(info->cs);
radeon_cs_space_add_persistent_bo(info->cs, accel_state->shaders_bo,
RADEON_GEM_DOMAIN_VRAM, 0);
@@ -1520,7 +1521,6 @@ static Bool R600PrepareComposite(int op, PicturePtr pSrcPicture,
uint32_t blendcntl, dst_format;
cb_config_t cb_conf;
shader_config_t vs_conf, ps_conf;
- int ret;
/* return FALSE; */
@@ -1547,6 +1547,8 @@ static Bool R600PrepareComposite(int op, PicturePtr pSrcPicture,
#if defined(XF86DRM_MODE)
if (info->cs) {
+ int ret;
+
accel_state->dst_mc_addr = 0;
accel_state->dst_bo = radeon_get_pixmap_bo(pDst);
accel_state->src_bo[0] = radeon_get_pixmap_bo(pSrc);
commit 4d90dc3cb248e9d61c0c490bba80f6727fafd318
Author: Alex Deucher <alexdeucher at gmail.com>
Date: Mon Nov 30 11:05:38 2009 -0500
atom: pull misc mode info for lvds panel mode from bios tables
sync polarity, etc. This will likely fix LVDS problems
on some laptops.
Signed-off-by: Alex Deucher <alexdeucher at gmail.com>
diff --git a/src/radeon_atombios.c b/src/radeon_atombios.c
index 74606b3..462c5ef 100644
--- a/src/radeon_atombios.c
+++ b/src/radeon_atombios.c
@@ -1980,6 +1980,7 @@ RADEONGetATOMLVDSInfo(ScrnInfoPtr pScrn, radeon_lvds_ptr lvds)
radeon_native_mode_ptr native_mode = &lvds->native_mode;
atomDataTablesPtr atomDataPtr;
uint8_t crev, frev;
+ uint16_t misc;
atomDataPtr = info->atomBIOS->atomDataPtr;
@@ -2000,6 +2001,17 @@ RADEONGetATOMLVDSInfo(ScrnInfoPtr pScrn, radeon_lvds_ptr lvds)
native_mode->VBlank = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info->sLCDTiming.usVBlanking_Time);
native_mode->VOverPlus = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info->sLCDTiming.usVSyncOffset);
native_mode->VSyncWidth = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info->sLCDTiming.usVSyncWidth);
+ misc = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info->sLCDTiming.susModeMiscInfo.usAccess);
+ if (misc & ATOM_VSYNC_POLARITY)
+ native_mode->Flags |= V_NVSYNC;
+ if (misc & ATOM_HSYNC_POLARITY)
+ native_mode->Flags |= V_NHSYNC;
+ if (misc & ATOM_COMPOSITESYNC)
+ native_mode->Flags |= V_CSYNC;
+ if (misc & ATOM_INTERLACE)
+ native_mode->Flags |= V_INTERLACE;
+ if (misc & ATOM_DOUBLE_CLOCK_MODE)
+ native_mode->Flags |= V_DBLSCAN;
lvds->PanelPwrDly = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info->usOffDelayInMs);
lvds->lvds_misc = atomDataPtr->LVDS_Info.LVDS_Info->ucLVDS_Misc;
lvds->lvds_ss_id = atomDataPtr->LVDS_Info.LVDS_Info->ucSS_Id;
@@ -2014,6 +2026,17 @@ RADEONGetATOMLVDSInfo(ScrnInfoPtr pScrn, radeon_lvds_ptr lvds)
native_mode->VBlank = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info_v12->sLCDTiming.usVBlanking_Time);
native_mode->VOverPlus = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info_v12->sLCDTiming.usVSyncOffset);
native_mode->VSyncWidth = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info_v12->sLCDTiming.usVSyncWidth);
+ misc = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info_v12->sLCDTiming.susModeMiscInfo.usAccess);
+ if (misc & ATOM_VSYNC_POLARITY)
+ native_mode->Flags |= V_NVSYNC;
+ if (misc & ATOM_HSYNC_POLARITY)
+ native_mode->Flags |= V_NHSYNC;
+ if (misc & ATOM_COMPOSITESYNC)
+ native_mode->Flags |= V_CSYNC;
+ if (misc & ATOM_INTERLACE)
+ native_mode->Flags |= V_INTERLACE;
+ if (misc & ATOM_DOUBLE_CLOCK_MODE)
+ native_mode->Flags |= V_DBLSCAN;
lvds->PanelPwrDly = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info_v12->usOffDelayInMs);
lvds->lvds_misc = atomDataPtr->LVDS_Info.LVDS_Info_v12->ucLVDS_Misc;
lvds->lvds_ss_id = atomDataPtr->LVDS_Info.LVDS_Info_v12->ucSS_Id;
diff --git a/src/radeon_modes.c b/src/radeon_modes.c
index ec60cc9..3e3d4c8 100644
--- a/src/radeon_modes.c
+++ b/src/radeon_modes.c
@@ -158,7 +158,7 @@ static DisplayModePtr RADEONFPNativeMode(xf86OutputPtr output)
new->VSyncEnd = new->VSyncStart + native_mode->VSyncWidth;
new->Clock = native_mode->DotClock;
- new->Flags = 0;
+ new->Flags = native_mode->Flags;
if (new) {
new->type = M_T_DRIVER | M_T_PREFERRED;
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