xf86-video-intel: src/intel_batchbuffer.c src/intel_driver.c src/intel.h src/intel_uxa.c
Chris Wilson
ickle at kemper.freedesktop.org
Fri Apr 8 05:47:58 PDT 2011
src/intel.h | 2 ++
src/intel_batchbuffer.c | 9 +++++++++
src/intel_driver.c | 18 ++++++++++++++++++
src/intel_uxa.c | 13 ++++++++++++-
4 files changed, 41 insertions(+), 1 deletion(-)
New commits:
commit 97e9557619e58ef769eb7cbf1a03fbd52be7f2ed
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Fri Apr 8 13:38:48 2011 +0100
intel: Restore manual flush for old kernels
Daniel Vetter pointed out that the automagic flush by the kernel for the
busy-ioctl was only introduced upstream in 2.6.37. So we still need to
manually emit a flush on old kernels.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/intel.h b/src/intel.h
index 48a7cf9..2b114c3 100644
--- a/src/intel.h
+++ b/src/intel.h
@@ -425,6 +425,8 @@ typedef struct intel_screen_private {
Bool use_pageflipping;
Bool force_fallback;
Bool can_blt;
+ Bool has_kernel_flush;
+ Bool needs_flush;
Bool use_shadow;
/* Broken-out options. */
diff --git a/src/intel_batchbuffer.c b/src/intel_batchbuffer.c
index 95eca43..289ed2b 100644
--- a/src/intel_batchbuffer.c
+++ b/src/intel_batchbuffer.c
@@ -175,6 +175,13 @@ void intel_batch_emit_flush(ScrnInfoPtr scrn)
intel_batch_do_flush(scrn);
}
+static Bool intel_batch_needs_flush(intel_screen_private *intel)
+{
+ ScreenPtr screen = intel->scrn->pScreen;
+ PixmapPtr pixmap = screen->GetScreenPixmap(screen);
+ return intel_get_pixmap_private(pixmap)->batch_write;
+}
+
void intel_batch_submit(ScrnInfoPtr scrn)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
@@ -234,6 +241,8 @@ void intel_batch_submit(ScrnInfoPtr scrn)
}
}
+ intel->needs_flush |= intel_batch_needs_flush(intel);
+
while (!list_is_empty(&intel->batch_pixmaps)) {
struct intel_pixmap *entry;
diff --git a/src/intel_driver.c b/src/intel_driver.c
index 9e01836..1b0d740 100644
--- a/src/intel_driver.c
+++ b/src/intel_driver.c
@@ -448,6 +448,23 @@ static void I830XvInit(ScrnInfoPtr scrn)
intel->colorKey);
}
+static Bool has_kernel_flush(struct intel_screen_private *intel)
+{
+ drm_i915_getparam_t gp;
+ int value;
+
+ /* The BLT ring was introduced at the same time as the
+ * automatic flush for the busy-ioctl.
+ */
+
+ gp.value = &value;
+ gp.param = I915_PARAM_HAS_BLT;
+ if (drmIoctl(intel->drmSubFD, DRM_IOCTL_I915_GETPARAM, &gp))
+ return FALSE;
+
+ return value;
+}
+
static Bool can_accelerate_blt(struct intel_screen_private *intel)
{
if (0 && (IS_I830(intel) || IS_845G(intel))) {
@@ -597,6 +614,7 @@ static Bool I830PreInit(ScrnInfoPtr scrn, int flags)
intel->tiling &= ~INTEL_TILING_FB;
intel->can_blt = can_accelerate_blt(intel);
+ intel->has_kernel_flush = has_kernel_flush(intel);
intel->use_shadow = !intel->can_blt;
if (xf86IsOptionSet(intel->Options, OPTION_SHADOW)) {
diff --git a/src/intel_uxa.c b/src/intel_uxa.c
index 24ef6fa..df3adcb 100644
--- a/src/intel_uxa.c
+++ b/src/intel_uxa.c
@@ -937,7 +937,18 @@ static Bool intel_uxa_get_image(PixmapPtr pixmap,
static void intel_flush_rendering(intel_screen_private *intel)
{
- drm_intel_bo_busy(intel->front_buffer);
+ if (intel->needs_flush == 0)
+ return;
+
+ if (intel->has_kernel_flush) {
+ intel_batch_submit(intel->scrn);
+ drm_intel_bo_busy(intel->front_buffer);
+ } else {
+ intel_batch_emit_flush(intel->scrn);
+ intel_batch_submit(intel->scrn);
+ }
+
+ intel->needs_flush = 0;
}
void intel_uxa_block_handler(intel_screen_private *intel)
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