intel-gen4asm: Changes to 'master'
Haihao Xiang
haihao at kemper.freedesktop.org
Wed Oct 10 18:36:45 PDT 2012
src/Makefile.am | 2
src/brw_defines.h | 4
src/brw_structs.h | 27 +-
src/gen4asm.h | 5
src/gram.y | 622 ++++++++++++++++++++++++++++++------------------------
src/lex.l | 4
src/main.c | 129 ++++++++---
test/declare.g4a | 1
8 files changed, 484 insertions(+), 310 deletions(-)
New commits:
commit a41d964869f0e3aafa21aea88f5579f1e619606f
Author: Homer Hsing <homer.xing at intel.com>
Date: Fri Sep 28 14:10:00 2012 +0800
Show warning when compiling the grammar parser
commit b56ecf44832dc798f8b824287743763e7cbee068
Author: Homer Hsing <homer.xing at intel.com>
Date: Fri Sep 28 14:05:51 2012 +0800
Support Gen6 WHILE instruction
commit 03789fc7240cc14ce4d3b6ed25afc3bfd8c83e7f
Author: Homer Hsing <homer.xing at intel.com>
Date: Fri Sep 28 14:02:25 2012 +0800
Make sure Gen6 IF works
commit 34f06e1ea81354bb09bf5f9134cbfd9f7cc81922
Author: Homer Hsing <homer.xing at intel.com>
Date: Fri Sep 28 13:46:21 2012 +0800
Make sure Gen6 ENDIF work
commit f414c680322e1149ea18f1e130b4fc2894184342
Author: Homer Hsing <homer.xing at intel.com>
Date: Fri Sep 28 13:43:44 2012 +0800
Fix JIP position for Gen6 JMPI
commit 7c4379ae57efbe1c9fe308bf4aa24d8ddd7cbbc0
Author: Homer Hsing <homer.xing at intel.com>
Date: Thu Sep 27 16:20:39 2012 +0800
Fix Gen6 ELSE instructions code logic according to bspec.
commit d64d27a1ec91a7937c23887b8d16c73eb962da52
Author: Homer Hsing <homer.xing at intel.com>
Date: Thu Sep 27 15:44:15 2012 +0800
Make sure BREAK/CONT/HALT work on Gen6.
commit c3be8d13910e2ef19a2e10bfdb2f354a90fb75be
Author: Homer Hsing <homer.xing at intel.com>
Date: Thu Sep 27 15:39:28 2012 +0800
Support Gen6 RET instruction.
commit e1122bde00707a51d5067c65be3094bcad8e419a
Author: Homer Hsing <homer.xing at intel.com>
Date: Thu Sep 27 15:31:56 2012 +0800
Support Gen6 CALL instruction.
commit 4afd395e4793369a50e2654305f31eec936a5616
Author: Homer Hsing <homer.xing at intel.com>
Date: Thu Sep 27 14:56:30 2012 +0800
Replace variable init code in WAIT by src_null_reg
commit 809938ec0be94d7204385e08757716fdef746bed
Author: Homer Hsing <homer.xing at intel.com>
Date: Thu Sep 27 14:48:14 2012 +0800
Let ip_dst and ip_src become local const variable, so as to reduce replicated code.
commit 3eae850f3de772afc40142e2eab0ec180a590b89
Author: Homer Hsing <homer.xing at intel.com>
Date: Thu Sep 27 14:20:32 2012 +0800
Support Gen6 three-source-operand instructions.
Add bits1.three_src.gen6.dest_reg_file according to Gen6 spec
commit 70c8eb3952afd9c71fbecc4ff470de158ebbb0e4
Author: Homer Hsing <homer.xing at intel.com>
Date: Thu Sep 27 13:51:33 2012 +0800
Compile ELSE and WHILE in Gen5 as same way as in Gen4
commit f6fbfc762dfdde347afd382fcc372ba447351f21
Author: Homer Hsing <homer.xing at intel.com>
Date: Mon Sep 24 16:39:36 2012 +0800
Fix reloc_target_offset computing logic
commit 679e7a31fb3b14cbeb7636d63055af76397156f3
Author: Homer Hsing <homer.xing at intel.com>
Date: Mon Sep 24 10:12:26 2012 +0800
Fully support Gen7 branching instructions
Also fix integer argument parsing rule for JMPI, IF and WHILE
Fix shift/reduce conflicts in relativelocation
commit a812395d069a9c18d9c5f1ed566128b9e7e091ae
Author: Homer Hsing <homer.xing at intel.com>
Date: Mon Sep 24 10:06:35 2012 +0800
Supporting multi-branch instructios BRD & BRC
brd: redirect channels to branches
brc: let channels converging together
also rewrite code converting label to offset
commit 4b9c14b15536f3292875d4909dea7a103c683c80
Author: Homer Hsing <homer.xing at intel.com>
Date: Fri Sep 21 12:35:35 2012 +0800
Use right-recursing in parser rule inst_option_list
This recursing cost less memory. It is recommended by Bison.
commit e5962affedd34044ec261bcfc31fb7f41c8033d0
Author: Homer Hsing <homer.xing at intel.com>
Date: Fri Sep 21 12:33:13 2012 +0800
Support subroutine instructions, CALL & RET
commit 24280aedbf353b2e68faa063fca0b32f72fc6f54
Author: Homer Hsing <homer.xing at intel.com>
Date: Fri Sep 21 10:14:31 2012 +0800
Merge replicative code in gram.y
commit 22e4490848868259cdff141082c1824623360acb
Author: Homer Hsing <homer.xing at intel.com>
Date: Fri Sep 21 10:06:20 2012 +0800
Reduce replicative code in gram.y by reloc_target field in src_operand
Bspec says JIP and UIP should be the source operands. It is better if
src_operand has a field "reloc_target" according to bspec.
The replicative code in JMPI and branchloop rules can be merged into one.
commit 2d327f3e6294d1bca39991d556d52f81cef642e3
Author: Homer Hsing <homer.xing at intel.com>
Date: Fri Sep 21 09:51:55 2012 +0800
Restrict type of relativelocation2 to int
Original rule set it to EXP | NUMBER, then YYERROR if it is NUMBER.
This patch set it directly to EXP, restricting its type to int.
commit 73857f8ac6cca19fe0e2580382f2949a27cfe89d
Author: Homer Hsing <homer.xing at intel.com>
Date: Fri Sep 21 09:37:06 2012 +0800
Rewrite label matching code. Collect labels in a linked list.
Label matching is faster because of searching only in a small list,
rather than searching a label in all instructions.
commit 08927f16756564182d81ba394e27cf95e488bbe9
Author: Homer Hsing <homer.xing at intel.com>
Date: Fri Sep 21 08:39:57 2012 +0800
Add second_reloc_target in the data structure.
Since Gen6+, some branching instructions have two relocation targets.
commit 3c3aa718512d725870707722b6afd13b77f26aa9
Author: Homer Hsing <homer.xing at intel.com>
Date: Thu Sep 20 14:06:06 2012 +0800
Add test case for ".declare" overriding feature.
Later same name .declare pragma will override previously defined
one. This patch add a test case for that feature.
commit 66a0038e8a0ef1d248ff21b6852ad782799d5e14
Author: Homer Hsing <homer.xing at intel.com>
Date: Thu Sep 20 14:04:20 2012 +0800
Fix memory leaking in the parser
STRING has been malloc'ed by strdup in src/lex.l but forgotten to
be freed in src/gram.y.
More information about the xorg-commit
mailing list