[PATCH xf86-video-intel 2/2] Fix handling of target_msc, divisor, remainder in I830DRI2ScheduleSwap()

[Jesse Barnes]

On Sun, 21 Feb 2010 18:45:48 +0100
Mario Kleiner <mario.kleiner at tuebingen.mpg.de> wrote:

> The current code in I830DRI2ScheduleSwap() only schedules the
> correct vblank events for the case divisor == 0, i.e., the
> simple glXSwapBuffers() case.
> 
> In a glXSwapBuffersMscOML() request, divisor can be > 0, which would go
> wrong.
> 
> This modified code should handle target_msc, divisor, remainder and
> the different cases defined in the OML_sync_control extension
> correctly for the divisor > 0 case.
> 
> It also tries to make sure that the effective framecount of swap satisfies
> all constraints, taking the 1 frame delay in pageflipping mode and possible
> delays in blitting/exchange mode due to DRM_VBLANK_NEXTONMISS into account.
> 
> The swap_interval logic in the X-Servers DRI2SwapBuffers() call expects
> the returned swap_target from the DDX to be reasonably accurate, otherwise
> implementation of swap_interval for the glXSwapBuffers() as defined in the
> SGI_swap_interval extension may become unreliable.
> 
> For non-pageflipped mode, the returned swap_target is always correct due to the
> adjustments done by drmWaitVBlank(), as DRM_VBLANK_NEXTONMISS is set.
> 
> In pageflipped mode, DRM_VBLANK_NEXTONMISS can't be used without
> severe impact on performance, so the code in I830DRI2ScheduleSwap()
> must make manual adjustments to the returned vbl.reply.sequence number.
> 
> This patch adds the needed adjustments.
> 
> Signed-off-by: Mario Kleiner <mario.kleiner at tuebingen.mpg.de>
> ---

I just fixed these up and pushed them into the tree along with another
fix for handling offscreen drawables better.  Tests indicate that OML
swap divisor/remainder stuff is working correctly now.

Thanks!
-- 
Jesse Barnes, Intel Open Source Technology Center