[PATCH 2/4] X event queue mutex
joerg at britannica.bec.de
Tue Oct 7 00:10:41 PDT 2008
On Mon, Oct 06, 2008 at 09:40:39PM -0700, Keith Packard wrote:
> > I really don't know how to check if a CPU is visible to the other CPU.
> The question is whether writes to memory from one CPU will be visible to
> another CPU.
The short answer is eventually. The longer answer is that this heavily
depends on the platform, Intel CPUs generally having high automatic
coherenciy, SPARC being on the other end. Please do *not* start to write
code that depends on it, the current abstraction of the OS interfaces
for buses and especially the whole locking in the (kernel) DRI code is
bad enough as it is. Any bugs in such code are horribly hard to find and
are even more like to not be visible much on Intel (if at all).
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