Intel Graphics question
zhenyu.z.wang at intel.com
Thu Feb 19 18:19:49 PST 2009
On 2009.02.20 07:43:21 +0800, Joseph Smith wrote:
> I am a coreboot (http://www.coreboot.org) developer working mostly Intel
> chipsets. Currently I am working an set-top-box with an Intel chipset. I am
> looking into implementing LVDS and TV-OUT support for various Intel GMCH's
> for set-top-boxes and possibly laptops starting right from the firmware. I
> kind of understand how it works but not exactly sure in which order it
> needs to happen. Could anyone please help me understand or confirm if this
> is right:
> 1. All GMCH graphics settings are available through 512k graphics mmio
> 2. Current graphics settings are read from graphics mmio space
> 2. i2c communications is setup through GMCH graphics mmio space
> 3. LVDS and/or TV-OUT chip is programmed via i2c according to graphic
> settings read from graphics mmio space
> 4. DVO port that the LVDS and/or TV-OUT chip is connected to is turned on
> Did I miss anything else?
> Thanks in advance to any help you can give me.
MMIO space is where all the modesetting stuffs happen.
You can look up xf86-video-intel source for information to setup outputs.
Open Source Technology Center, Intel ltd.
$gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
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