[ANNOUNCE] xf86-video-intel 2.21.4

Chris Wilson chris at chris-wilson.co.uk
Mon Mar 11 06:29:02 PDT 2013

Release 2.21.4 (2013-03-11)
More bugs, more fixes, more releases. A minor new feature being introduced
is the runtime detection of CPU instructions sets along with specialised
paths to take advantage of the available CPU.

 * Honour LinearFramebuffer for clumsy PowerXpress integration

 * Disable read-read optimisations of mappings whilst the root
   cause of a corruption issue remains elusive.

 * Disable 8-bpp framebuffers in UXA as the regressions therein
   remain unfixed.

 * Restart vertex checks after lock contention

 * Handle Screen Pixmap recreation whilst exported via PRIME.

 * Correct application of scale factors to video source offsets.

 * Chain up CloseScreen so that resources are actually freed across regen

 * Fix Haswell CRW PCI-IDs

 * Handle batch submission failure during DRI copies

 * Probe for kernel support of requested Screen depth

 * Correct GPU limits for early gen2 and gen3 architectures and prevent
   an infinite recursion for particular image sizes.

Complete list of changes since 2.21.3

Carl Worth (1):
      Refuse to load driver for depth-8 X server.

Chris Wilson (94):
      sna: Honour LinearFramebuffer
      sna: Always enable the solid-cache and gradient-cache
      sna/dri: Eradicate the DRI2 name exchange mechanism
      sna/gen7: Only a pipeline stall is required for the CA pass
      sna/gen7: Skip CLEAR_PARAMS for the null depthbuffer
      sna: Avoid migrating and making the GPU bo busy prior to mmapping it
      sna: Optimise mmap of GPU bo for read-read operations
      sna: Allow picture fixup in channel format if not changing RGB depth
      sna: Allow search_linear_cache() to reuse large buffers
      sna: Retire before looking for a large 2D buffer
      sna: Refuse to create larger than max temporary upload bo
      sna: Tidy a call to set the gamma before setting up a CRTC
      sna: Reduce DefaultDepth to 16 on older chipsets
      sna/gen3: Factor out the per-vertex divide for gradients
      sna/trapezoids: Instruct the compiler to flatten the callees whilst rasterising
      sna/gen3+: Assert that nbox is not 0
      sna/gen3+: Restart vertex space checks after lock contention
      sna: Detect available instruction sets at runtime
      test: Correct ignore path for async.avi
      sna/gen4+: Begin specialising vertex programs for ISA
      sna: Reverse inverted assertions
      sna: Fix build on older GCC for cpuid()
      sna: Print detected CPU features
      sna/gen3: Allow conditional use of SSE2
      sna: Ignore SSE4a - not an Intel ISA!
      sna: Mention if compiled as 64bit as part of the CPU feature detection
      sna: Only use the GPU bo after migrating
      sna/gen4+: All associated CPUs have sse2 at least
      sna/gen4: Cluster ISA
      sna: Conditionally compile avx routines
      sna: Conditionally compile sse4_2 routines
      sna: Conditionally compile sse2 routines
      sna: Bump required GCC for sse2
      sna: Flatten unaligned box emission
      sna: Improve handling of migrated userptr bo
      sna/trapezoids: Add a pair of unlikely hints for forced box emission
      sna/gen3: Expand the number of SSE2 routines for basic composite ops
      sna: Flatten the glyph emitters
      sna: Force GCC to use the SSE unit for SSE2 routines
      sna/gen2: Add SSE2 fast paths for vertex emission
      sna: Migrate dirty tracking across ScreenPixmap updates
      sna: Remove the trailing '.' from the previous commit
      sna: Improve compatibility of cpuid.h detection
      sna: Prettify GCC version detection in headers
      sna/dri: Fix use of uninitialised pipe along error path
      sna: Fix syntax for __get_cpuid()
      sna/video: Correct scaling of source offsets
      sna: Track number of pixmaps allocated whilst counting bo leaks
      sna: Use depth-15 rather than depth-16 for reduced bw devices
      sna: Move some conditional code out-of-line
      sna: Assert that the ScrnInfo and ScreenPtr relationship is correct
      sna: Assert that we do not resurrect stale pixmap across a server regen
      sna: Assert that when caching a pixmap header the pScreen match
      sna: Assert that inplace operations are done on coherent maps
      sna: Chain up CloseScreen
      Fix Haswell CRW PCI-IDs
      sna: Eliminate a few used-once local variables
      sna/dri: Guard against failed batch submission
      sna: Probe for kernel support of framebuffer formats
      sna: Undo preferred depth for gen3
      sna: CPUID return ISA features in ecx/edx
      sna/gen3: Add some debug around rendercopies of the fbcon
      sna/gen3: Correct typo in assertion
      sna: Nullify cache pointers upon server regen
      sna: Only destroy the cached CLEAR picture if it exists
      sna/gen3: Perform alpha-fixup upon copy sources
      sna/gen3: Always prefer BLT for copies
      sna: Ensure we do not attempt to operate inplace on a very large pixmap
      sna: Drop a local variable only used to hold a constant
      sna: Ensure that the tearfree swap is unmapped afterwards
      sna: Be explicit when checking for an idle bo after CPU synchronisation
      sna: Prefer GPU for self-copies when undamaged on the CPU
      sna: Refactor the is-mappable test for inplace operations
      sna: Fix deference of just nullified GPU bo in previous commit
      sna: Use drawable_gc_flags() to select placement for PolyArc
      sna: The GPU bo submit is still required before mapping for inplace operations
      sna: Assert that the pixmap is not pinned before releasing the GPU bo
      sna: Typo ('unsuported') in DBG messages
      sna: Lighten the wakeup handler slightly
      sna: Disable read-read optimisations
      intel: Relax the has-kms test slightly
      sna: Return early if there are no outputs to setup
      sna: Supply a fake pipe to run completely headless
      sna: Disambiguate sna_crtc_resize()
      sna: Remove the unused output and crtc lists
      sna: Trim tile sizes to fit aperture constraints
      sna: Fallback if we cannot fit the tiling copy into the aperture
      sna/gen4: Initialise a pair of unimportant variables
      sna: Only shrink the maximum GPU size to fit into cache
      sna/dri: Add a couple more basic assertions
      sna/dri: Flatten _sna_dri_destroy_buffer()
      sna: Tweak CPU mappings to be only used if a read is required
      sna: Tighten checking for coherent maps
      2.21.4 release

git tag: 2.21.4

MD5:  6e45a8684b5a3b4a0ba795aba3b5f0fc  xf86-video-intel-2.21.4.tar.bz2
SHA1: 3138eb83dbcf2b1d290fd7ef4eae7568c7d93463  xf86-video-intel-2.21.4.tar.bz2
SHA256: 2f5983627013170db5b53d5c3ca7ad5fe843f3a0fa16ea136d6a4aa684c9cb03  xf86-video-intel-2.21.4.tar.bz2

MD5:  e62962ee08458650404a551bf5e7a040  xf86-video-intel-2.21.4.tar.gz
SHA1: 2e48698c8ffa228ae6db5afa2745a312387b281f  xf86-video-intel-2.21.4.tar.gz
SHA256: fe34edd7a38e9bee9314800fb06dde25ed6e21e8b4df612befa0ca8257c7287c  xf86-video-intel-2.21.4.tar.gz

Chris Wilson, Intel Open Source Technology Centre

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