[PATCH v2 0/3] drm/amdgpu: update golden setting of VI

[Christian König]

Well, usually they are just the recommended settings from the hardware 
team which try to fix or improve things by changing the default values 
for the registers.

I work for AMD and sometimes it isn't clear to me either what those 
changes are good for. E.g. I would need to dig though a whole bunch of 
register documentation and hardware specs to figure that out.

Alternatively I can try to steal some free time from the hardware guy 
who initiated the change and try to figure out the background.

Both tasks are rather time consuming and most likely not necessary at 
all as long as you don't run into a regression.

Regards,
Christian.

Am 03.08.2016 um 14:09 schrieb Edward O'Callaghan:
> I forgot to say, if this is clear to everyone else but me you can just
> ignore my noise here :p
>
> On 08/03/2016 10:06 PM, Edward O'Callaghan wrote:
>> Hi,
>>
>> I think it would be helpful for at least one liner explaining actually
>> what is even getting "fixed" here? Obviously we assume, given that you
>> work for AMD, these magics are correct however it does help in case of
>> issue.
>>
>> Just for a motivating example, suppose a magic is technically correct as
>> per hw documentation but there is a bug in the ASIC itself that this
>> changed caused a regression with then we would know where/how it occurs.
>>
>> Kind Regards,
>> Edward.
>>
>> On 08/02/2016 03:23 PM, Huang Rui wrote:
>>> Hi all,
>>>
>>> This patch set are all changes of golden setting, mgcg_cgcg setting,
>>> tiling mode array and rev id of VI series of cards.
>>>
>>> Changes from V1 -> V2:
>>> - Polaris10 changes are in tonga and polaris11 patches. And fix it.
>>>
>>> Thanks,
>>> Rui
>>>
>>> Huang Rui (3):
>>>    drm/amdgpu: update golden setting of tonga
>>>    drm/amdgpu: update golden setting of polaris11
>>>    drm/amdgpu: update golden setting of polaris10
>>>
>>>   drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 10 ++++++----
>>>   1 file changed, 6 insertions(+), 4 deletions(-)
>>>
>>
>>
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>>
>
>
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