[PATCH] drm/amd/amdgpu: Partially revert change to UVD v3 CG
Tom St Denis
tstdenis82 at gmail.com
Wed Aug 3 16:47:14 UTC 2016
Partially undo changes made by commit:
drm/amd/amdgpu: don't track state in UVD clockgating
To keep bypass even if CG flags are not set.
Signed-off-by: Tom St Denis <tom.stdenis at amd.com>
---
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index 391457f1eafd..c11b97f8e376 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -960,13 +960,13 @@ static int uvd_v6_0_set_clockgating_state(void *handle,
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- if (!(adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG))
- return 0;
-
if (adev->asic_type == CHIP_FIJI ||
adev->asic_type == CHIP_POLARIS10)
uvd_v6_set_bypass_mode(adev, state == AMD_CG_STATE_GATE ? true : false);
+ if (!(adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG))
+ return 0;
+
if (state == AMD_CG_STATE_GATE) {
/* disable HW gating and enable Sw gating */
uvd_v6_0_set_sw_clock_gating(adev);
--
2.9.2
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