[PATCH 1/6] drm/amd/amdgpu: fix indentation in vce3 CG

[Christian König]

Am 03.08.2016 um 17:51 schrieb Tom St Denis:
> Signed-off-by: Tom St Denis <tom.stdenis at amd.com>

This one is Reviewed-by: Christian König <christian.koenig at amd.com>.

For the rest I'm not deep enough into the topic to judge.

Regards,
Christian.

> ---
>   drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 13 +++++++------
>   1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
> index e5b18ad42721..26fb606e2d3e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
> @@ -126,6 +126,7 @@ static void vce_v3_0_set_vce_sw_clock_gating(struct amdgpu_device *adev,
>   					     bool gated)
>   {
>   	u32 tmp, data;
> +
>   	/* Set Override to disable Clock Gating */
>   	vce_v3_0_override_vce_clock_gating(adev, true);
>   
> @@ -165,9 +166,9 @@ static void vce_v3_0_set_vce_sw_clock_gating(struct amdgpu_device *adev,
>   		/* Force VCE_UENC_DMA_DCLK_CTRL Clock ON */
>   		tmp = data = RREG32(mmVCE_UENC_DMA_DCLK_CTRL);
>   		data |= VCE_UENC_DMA_DCLK_CTRL__WRDMCLK_FORCEON_MASK |
> -				VCE_UENC_DMA_DCLK_CTRL__RDDMCLK_FORCEON_MASK |
> -				VCE_UENC_DMA_DCLK_CTRL__REGCLK_FORCEON_MASK  |
> -				0x8;
> +			VCE_UENC_DMA_DCLK_CTRL__RDDMCLK_FORCEON_MASK |
> +			VCE_UENC_DMA_DCLK_CTRL__REGCLK_FORCEON_MASK  |
> +			0x8;
>   		if (tmp != data)
>   			WREG32(mmVCE_UENC_DMA_DCLK_CTRL, data);
>   	} else {
> @@ -201,9 +202,9 @@ static void vce_v3_0_set_vce_sw_clock_gating(struct amdgpu_device *adev,
>   		/* Set VCE_UENC_DMA_DCLK_CTRL CG always in dynamic mode */
>   		tmp = data = RREG32(mmVCE_UENC_DMA_DCLK_CTRL);
>   		data &= ~(VCE_UENC_DMA_DCLK_CTRL__WRDMCLK_FORCEON_MASK |
> -				VCE_UENC_DMA_DCLK_CTRL__RDDMCLK_FORCEON_MASK |
> -				VCE_UENC_DMA_DCLK_CTRL__REGCLK_FORCEON_MASK  |
> -				0x8);
> +			  VCE_UENC_DMA_DCLK_CTRL__RDDMCLK_FORCEON_MASK |
> +			  VCE_UENC_DMA_DCLK_CTRL__REGCLK_FORCEON_MASK  |
> +			  0x8);
>   		if (tmp != data)
>   			WREG32(mmVCE_UENC_DMA_DCLK_CTRL, data);
>   	}