[PATCH 05/19] drm/amdgpu: sync bo and shadow

Chunming Zhou David1.Zhou at amd.com
Fri Aug 5 09:38:32 UTC 2016


Use shadow flag to judge which direction to sync.

Change-Id: I9b540970d3a24c6aebeaa94c99f66a89134c663d
Signed-off-by: Chunming Zhou <David1.Zhou at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 52 ++++++++++++++++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h |  5 +++
 2 files changed, 57 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index d6ca3dd..c0f8d91 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -438,6 +438,58 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
 	return r;
 }
 
+int amdgpu_bo_sync_between_bo_and_shadow(struct amdgpu_device *adev,
+					 struct amdgpu_ring *ring,
+					 struct amdgpu_bo *bo,
+					 struct reservation_object *resv,
+					 struct fence **fence)
+
+{
+	struct amdgpu_bo *shadow = bo->shadow;
+	uint64_t bo_addr, shadow_addr;
+	int r;
+
+	if (!shadow)
+		return -EINVAL;
+
+	if (bo->shadow_flag & AMDGPU_SHADOW_FLAG_SYNC_TO_NONE) {
+		DRM_INFO("No need to sync bo and shadow\n");
+		return 0;
+	}
+	r = amdgpu_bo_pin(bo, bo->prefered_domains, &bo_addr);
+	if (r) {
+		DRM_ERROR("Failed to pin bo object\n");
+		goto err1;
+	}
+	r = amdgpu_bo_pin(bo->shadow, bo->shadow->prefered_domains, &shadow_addr);
+	if (r) {
+		DRM_ERROR("Failed to pin bo shadow object\n");
+		goto err2;
+	}
+
+	r = reservation_object_reserve_shared(bo->tbo.resv);
+	if (r)
+		goto err3;
+
+	if (bo->shadow_flag & AMDGPU_SHADOW_FLAG_SYNC_TO_PARENT)
+		r = amdgpu_copy_buffer(ring, shadow_addr, bo_addr,
+				       amdgpu_bo_size(bo), resv, fence);
+	else
+		r = amdgpu_copy_buffer(ring, bo_addr, shadow_addr,
+				       amdgpu_bo_size(bo), resv, fence);
+	if (!r) {
+		amdgpu_bo_fence(bo, *fence, true);
+		bo->shadow_flag = AMDGPU_SHADOW_FLAG_SYNC_TO_NONE;
+	}
+err3:
+	amdgpu_bo_unpin(bo->shadow);
+err2:
+	amdgpu_bo_unpin(bo);
+err1:
+
+	return r;
+}
+
 int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr)
 {
 	bool is_iomem;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index d650b42..68578c4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -155,6 +155,11 @@ int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
 void amdgpu_bo_fence(struct amdgpu_bo *bo, struct fence *fence,
 		     bool shared);
 u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo);
+int amdgpu_bo_sync_between_bo_and_shadow(struct amdgpu_device *adev,
+					 struct amdgpu_ring *ring,
+					 struct amdgpu_bo *bo,
+					 struct reservation_object *resv,
+					 struct fence **fence);
 
 /*
  * sub allocation
-- 
1.9.1



More information about the amd-gfx mailing list