[PATCH 3/5] drm/amdgpu: fix lru size grouping
Felix Kuehling
felix.kuehling at amd.com
Thu Aug 18 17:46:04 UTC 2016
OK. Feel free to add my Reviewed-by.
On 16-08-18 03:54 AM, Christian König wrote:
>> /* custom LRU management */
>> struct amdgpu_mman_lru log2_size[AMDGPU_TTM_LRU_SIZE];
>> + struct amdgpu_mman_lru guard;
>> [FK] It would be safer to make the array AMDGPU_TTM_LRU_SIZE+1, instead
>> of adding a separate guard afterwards. That way the guard can't get
>> accidentally separated by a future change.
>
> Thought about that as well, but decided against it. The crux is just
> that ARRAY_SIZE() won't return the expected value any more.
>
> I'm going to add a comment explaining that this shouldn't be moved apart.
>
> Christian.
>
> Am 17.08.2016 um 23:00 schrieb Felix Kuehling:
>> One suggestion inline [FK].
>>
>> With that fixed, Reviewed-by: Felix Kuehling <Felix.Kuehling at amd.com>
>>
>> Regards,
>> Felix
>>
>>
>> On 16-08-17 08:26 AM, Christian König wrote:
>>> From: Christian König <christian.koenig at amd.com>
>>>
>>> Adding a BO can make it the insertion point for larger sizes as well.
>>>
>>> Signed-off-by: Christian König <christian.koenig at amd.com>
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 ++++++++
>>> 2 files changed, 9 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>> index a55eb6f..1f6de92 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>> @@ -428,6 +428,7 @@ struct amdgpu_mman {
>>> /* custom LRU management */
>>> struct amdgpu_mman_lru log2_size[AMDGPU_TTM_LRU_SIZE];
>>> + struct amdgpu_mman_lru guard;
>> [FK] It would be safer to make the array AMDGPU_TTM_LRU_SIZE+1, instead
>> of adding a separate guard afterwards. That way the guard can't get
>> accidentally separated by a future change.
>>
>>> };
>>> int amdgpu_copy_buffer(struct amdgpu_ring *ring,
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>> index f5dc87e..1a12ce0 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>> @@ -951,6 +951,8 @@ static struct list_head
>>> *amdgpu_ttm_lru_tail(struct ttm_buffer_object *tbo)
>>> struct list_head *res = lru->lru[tbo->mem.mem_type];
>>> lru->lru[tbo->mem.mem_type] = &tbo->lru;
>>> + while ((++lru)->lru[tbo->mem.mem_type] == res)
>>> + lru->lru[tbo->mem.mem_type] = &tbo->lru;
>>> return res;
>>> }
>>> @@ -961,6 +963,8 @@ static struct list_head
>>> *amdgpu_ttm_swap_lru_tail(struct ttm_buffer_object *tbo)
>>> struct list_head *res = lru->swap_lru;
>>> lru->swap_lru = &tbo->swap;
>>> + while ((++lru)->swap_lru == res)
>>> + lru->swap_lru = &tbo->swap;
>>> return res;
>>> }
>>> @@ -1008,6 +1012,10 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
>>> lru->swap_lru = &adev->mman.bdev.glob->swap_lru;
>>> }
>>> + for (j = 0; j < TTM_NUM_MEM_TYPES; ++j)
>>> + adev->mman.guard.lru[j] = NULL;
>>> + adev->mman.guard.swap_lru = NULL;
>>> +
>>> adev->mman.initialized = true;
>>> r = ttm_bo_init_mm(&adev->mman.bdev, TTM_PL_VRAM,
>>> adev->mc.real_vram_size >> PAGE_SHIFT);
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