[PATCH 3/4] drm/amd/powerplay: get system info by cgs interface.

Deucher, Alexander Alexander.Deucher at amd.com
Mon Aug 22 13:43:45 UTC 2016


> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Monday, August 22, 2016 8:50 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH 3/4] drm/amd/powerplay: get system info by cgs interface.
> 
> Change-Id: I4cf5a2526b1c6320cefaedf781131e46b7c75d0c
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>

I'd suggest switching the order of patches 2 and 3 to avoid a temporary breakage in between.  Was there a patch 4?  I haven't seen it come through yet.  With the order fixed, patches 1-3 are:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>


> ---
>  .../gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c  | 24
> ++++++++++++++++++----
>  1 file changed, 20 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
> index 23d455c..3979adf 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
> @@ -3122,11 +3122,27 @@ int polaris10_patch_voltage_workaround(struct
> pp_hwmgr *hwmgr)
>  	struct phm_ppt_v1_voltage_lookup_table *lookup_table =
>  			table_info->vddc_lookup_table;
>  	uint32_t i;
> +	uint32_t hw_revision, sub_vendor_id, sub_sys_id;
> +	struct cgs_system_info sys_info = {0};
> 
> -	if (hwmgr->chip_id == CHIP_POLARIS10 && hwmgr->hw_revision ==
> 0xC7 &&
> -			((hwmgr->sub_sys_id == 0xb37 && hwmgr-
> >sub_vendor_id == 0x1002) ||
> -		    (hwmgr->sub_sys_id == 0x4a8 && hwmgr->sub_vendor_id
> == 0x1043) ||
> -		    (hwmgr->sub_sys_id == 0x9480 && hwmgr-
> >sub_vendor_id == 0x1682))) {
> +	sys_info.size = sizeof(struct cgs_system_info);
> +
> +	sys_info.info_id = CGS_SYSTEM_INFO_PCIE_REV;
> +	cgs_query_system_info(hwmgr->device, &sys_info);
> +	hw_revision = (uint32_t)sys_info.value;
> +
> +	sys_info.info_id = CGS_SYSTEM_INFO_PCIE_SUB_SYS_ID;
> +	cgs_query_system_info(hwmgr->device, &sys_info);
> +	sub_sys_id = (uint32_t)sys_info.value;
> +
> +	sys_info.info_id = CGS_SYSTEM_INFO_PCIE_SUB_SYS_VENDOR_ID;
> +	cgs_query_system_info(hwmgr->device, &sys_info);
> +	sub_vendor_id = (uint32_t)sys_info.value;
> +
> +	if (hwmgr->chip_id == CHIP_POLARIS10 && hw_revision == 0xC7 &&
> +			((sub_sys_id == 0xb37 && sub_vendor_id == 0x1002)
> ||
> +		    (sub_sys_id == 0x4a8 && sub_vendor_id == 0x1043) ||
> +		    (sub_sys_id == 0x9480 && sub_vendor_id == 0x1682))) {
>  		if (lookup_table->entries[dep_mclk_table-
> >entries[dep_mclk_table->count-1].vddInd].us_vdd >= 1000)
>  			return 0;
> 
> --
> 1.9.1
> 
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