[PATCH 06/23] drm/amdgpu/gfx8: correct KIQ hdp flush

[Yu, Xiangliang]

> -----Original Message-----
> From: Alex Deucher [mailto:alexdeucher at gmail.com]
> Sent: Tuesday, December 20, 2016 7:14 AM
> To: Yu, Xiangliang <Xiangliang.Yu at amd.com>
> Cc: amd-gfx list <amd-gfx at lists.freedesktop.org>;
> dl.SRDC_SW_GPUVirtualization <dl.SRDC_SW_GPUVirtualization at amd.com>
> Subject: Re: [PATCH 06/23] drm/amdgpu/gfx8: correct KIQ hdp flush
> 
> On Sat, Dec 17, 2016 at 11:16 AM, Xiangliang Yu <Xiangliang.Yu at amd.com>
> wrote:
> > KIQ has some behavior as compute ring.
> >
> > Signed-off-by: Xiangliang Yu <Xiangliang.Yu at amd.com>
> 
> Should be squashed into patch 5.

Sure. 

> 
> Alex
> 
> > ---
> >  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> > b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> > index ae20cd9..a5a9a8e 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> > @@ -6196,7 +6196,8 @@ static void gfx_v8_0_ring_emit_hdp_flush(struct
> > amdgpu_ring *ring)  {
> >         u32 ref_and_mask, reg_mem_engine;
> >
> > -       if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE) {
> > +       if ((ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE) ||
> > +           (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)) {
> >                 switch (ring->me) {
> >                 case 1:
> >                         ref_and_mask = GPU_HDP_FLUSH_DONE__CP2_MASK <<
> > ring->pipe;
> > --
> > 2.7.4
> >
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