[PATCH v3] drm/amdgpu: fix power distribution issue for Polaris10 XT

[Alex Deucher]

On Mon, Jul 11, 2016 at 10:54 PM, Ken Wang <Qingqing.Wang at amd.com> wrote:
> Change-Id: I8676174acd3273dd8dccc72ecc1d54e9626bdb71
> Signed-off-by: Ken Wang <Qingqing.Wang at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/atombios_i2c.c | 15 +++++++++++++++
>  drivers/gpu/drm/amd/amdgpu/atombios_i2c.h |  1 +
>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c     |  5 +++++
>  3 files changed, 21 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_i2c.c b/drivers/gpu/drm/amd/amdgpu/atombios_i2c.c
> index 13cdb01..8d8c252 100644
> --- a/drivers/gpu/drm/amd/amdgpu/atombios_i2c.c
> +++ b/drivers/gpu/drm/amd/amdgpu/atombios_i2c.c
> @@ -156,3 +156,18 @@ u32 amdgpu_atombios_i2c_func(struct i2c_adapter *adap)
>         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
>  }
>
> +void amdgpu_atombios_i2c_set_power_dist_reg(struct amdgpu_device* adev, u8 offset, u8 data)

How about:
void amdgpu_atombios_i2c_write_byte(struct amdgpu_device* adev, u8
i2c_line, u8 slave_addr, u8 offset, u8 data)
so we can use this as a generic helper.

> +{
> +       PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
> +       int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
> +
> +       args.ucRegIndex = offset;
> +       args.lpI2CDataOut = data;
> +       args.ucFlag = 1;
> +       args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
> +       args.ucTransBytes = 1;
> +       args.ucSlaveAddr = 0x10;

then
args.ucSlaveAddr = slave_addr;

> +       args.ucLineNumber = 0x96;

args.ucLineNumber = i2c_line;

> +
> +       amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args);
> +}
> diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_i2c.h b/drivers/gpu/drm/amd/amdgpu/atombios_i2c.h
> index d6128d9d..b9c706a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/atombios_i2c.h
> +++ b/drivers/gpu/drm/amd/amdgpu/atombios_i2c.h
> @@ -27,5 +27,6 @@
>  int amdgpu_atombios_i2c_xfer(struct i2c_adapter *i2c_adap,
>                       struct i2c_msg *msgs, int num);
>  u32 amdgpu_atombios_i2c_func(struct i2c_adapter *adap);
> +void amdgpu_atombios_i2c_set_power_dist_reg(struct amdgpu_device* adev, u8 offset, u8 data);
>
>  #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index dbef1ed..99616a7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -28,6 +28,7 @@
>  #include "vid.h"
>  #include "amdgpu_ucode.h"
>  #include "amdgpu_atombios.h"
> +#include "atombios_i2c.h"
>  #include "clearstate_vi.h"
>
>  #include "gmc/gmc_8_2_d.h"
> @@ -693,6 +694,10 @@ static void gfx_v8_0_init_golden_registers(struct amdgpu_device *adev)
>                 amdgpu_program_register_sequence(adev,
>                                                  polaris10_golden_common_all,
>                                                  (const u32)ARRAY_SIZE(polaris10_golden_common_all));
> +               if (adev->pdev->revision == 0xc7) {
> +                       amdgpu_atombios_i2c_set_power_dist_reg(adev, 0x1E, 0xDD);
> +                       amdgpu_atombios_i2c_set_power_dist_reg(adev, 0x1F, 0xD0);

Then here:
amdgpu_atombios_i2c_write_byte(adev, 0x96, 01x10, 0x1E, 0xDD);
amdgpu_atombios_i2c_write_byte(adev, 0x96, 01x10, 0x1F, 0xD0);

> +               }
>                 break;
>         case CHIP_CARRIZO:
>                 amdgpu_program_register_sequence(adev,
> --
> 2.7.4
>
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