[PATCH] drm/amd/powerplay: implement get_clock_by_type for iceland.

[Deucher, Alexander]

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Thursday, November 10, 2016 1:08 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH] drm/amd/powerplay: implement get_clock_by_type for
> iceland.
> 
> iceland use pptable v0.
> 
> Change-Id: Ifaf5dc081c76a014d97f80b8bde0a21003271dd5
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 51
> +++++++++++++++---------
>  1 file changed, 33 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> index 3266f40..b1c7751 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> @@ -4243,18 +4243,26 @@ static int smu7_get_sclks(struct pp_hwmgr
> *hwmgr, struct amd_pp_clocks *clocks)
>  {
>  	struct phm_ppt_v1_information *table_info =
>  			(struct phm_ppt_v1_information *)hwmgr->pptable;
> -	struct phm_ppt_v1_clock_voltage_dependency_table
> *dep_sclk_table;
> +	struct phm_ppt_v1_clock_voltage_dependency_table
> *dep_sclk_table = NULL;
> +	struct phm_clock_voltage_dependency_table *sclk_table;
>  	int i;
> 
> -	if (table_info == NULL)
> -		return -EINVAL;
> -
> -	dep_sclk_table = table_info->vdd_dep_on_sclk;
> -
> -	for (i = 0; i < dep_sclk_table->count; i++) {
> -		clocks->clock[i] = dep_sclk_table->entries[i].clk;
> -		clocks->count++;
> +	if (hwmgr->pp_table_version == PP_TABLE_V1) {
> +		if (table_info == NULL || table_info->vdd_dep_on_sclk ==
> NULL)
> +			return -EINVAL;
> +		dep_sclk_table = table_info->vdd_dep_on_sclk;
> +		for (i = 0; i < dep_sclk_table->count; i++) {
> +			clocks->clock[i] = dep_sclk_table->entries[i].clk;
> +			clocks->count++;
> +		}
> +	} else if (hwmgr->pp_table_version == PP_TABLE_V0) {
> +		sclk_table = hwmgr->dyn_state.vddc_dependency_on_sclk;
> +		for (i = 0; i < sclk_table->count; i++) {
> +			clocks->clock[i] = sclk_table->entries[i].clk;
> +			clocks->count++;
> +		}
>  	}
> +
>  	return 0;
>  }
> 
> @@ -4276,17 +4284,24 @@ static int smu7_get_mclks(struct pp_hwmgr
> *hwmgr, struct amd_pp_clocks *clocks)
>  			(struct phm_ppt_v1_information *)hwmgr->pptable;
>  	struct phm_ppt_v1_clock_voltage_dependency_table
> *dep_mclk_table;
>  	int i;
> +	struct phm_clock_voltage_dependency_table *mclk_table;
> 
> -	if (table_info == NULL)
> -		return -EINVAL;
> -
> -	dep_mclk_table = table_info->vdd_dep_on_mclk;
> -
> -	for (i = 0; i < dep_mclk_table->count; i++) {
> -		clocks->clock[i] = dep_mclk_table->entries[i].clk;
> -		clocks->latency[i] = smu7_get_mem_latency(hwmgr,
> +	if (hwmgr->pp_table_version == PP_TABLE_V1) {
> +		if (table_info == NULL)
> +			return -EINVAL;
> +		dep_mclk_table = table_info->vdd_dep_on_mclk;
> +		for (i = 0; i < dep_mclk_table->count; i++) {
> +			clocks->clock[i] = dep_mclk_table->entries[i].clk;
> +			clocks->latency[i] = smu7_get_mem_latency(hwmgr,
>  						dep_mclk_table-
> >entries[i].clk);
> -		clocks->count++;
> +			clocks->count++;
> +		}
> +	} else if (hwmgr->pp_table_version == PP_TABLE_V0) {
> +		mclk_table = hwmgr-
> >dyn_state.vddc_dependency_on_mclk;
> +		for (i = 0; i < mclk_table->count; i++) {
> +			clocks->clock[i] = mclk_table->entries[i].clk;
> +			clocks->count++;
> +		}
>  	}
>  	return 0;
>  }
> --
> 1.9.1
> 
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