[PATCH 33/76] drm/amd/dal: remove supported_stream_engines
Harry Wentland
harry.wentland at amd.com
Mon Nov 21 23:00:53 UTC 2016
From: Tony Cheng <tony.cheng at amd.com>
- unnecesasry. DIG always start from instance 0
Signed-off-by: Tony Cheng <tony.cheng at amd.com>
Acked-by: Harry Wentland <harry.wentland at amd.com>
---
drivers/gpu/drm/amd/dal/dc/core/dc_resource.c | 10 +++-------
drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c | 7 -------
drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c | 6 ------
drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c | 7 -------
drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c | 7 -------
drivers/gpu/drm/amd/dal/dc/inc/core_types.h | 3 ---
drivers/gpu/drm/amd/dal/include/grph_object_id.h | 16 ----------------
7 files changed, 3 insertions(+), 53 deletions(-)
diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
index 0c02894cef26..22bfa45292e6 100644
--- a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
@@ -175,13 +175,9 @@ bool resource_construct(
pool->stream_enc_count = 0;
if (create_funcs->create_stream_encoder) {
for (i = 0; i < caps->num_stream_encoder; i++) {
- /* TODO: rework fragile code*/
- if (pool->stream_engines.u_all & 1 << i) {
- pool->stream_enc[i] = create_funcs->create_stream_encoder(
- i, ctx);
- if (pool->stream_enc[i] == NULL)
- DC_ERR("DC: failed to create stream_encoder!\n");
- }
+ pool->stream_enc[i] = create_funcs->create_stream_encoder(i, ctx);
+ if (pool->stream_enc[i] == NULL)
+ DC_ERR("DC: failed to create stream_encoder!\n");
pool->stream_enc_count++;
}
}
diff --git a/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c
index 81319166ed16..5c97be9925f9 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c
@@ -868,13 +868,6 @@ static bool construct(
pool->base.funcs = &dce100_res_pool_funcs;
pool->base.underlay_pipe_index = -1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGA = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGB = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGC = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGD = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGE = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGF = 1;
-
bp = ctx->dc_bios;
if ((bp->funcs->get_firmware_info(bp, &info) == BP_RESULT_OK) &&
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c
index 15958e6cedd1..ef0af3a72ccd 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c
@@ -1198,12 +1198,6 @@ static bool construct(
/*************************************************
* Create resources *
*************************************************/
- pool->base.stream_engines.engine.ENGINE_ID_DIGA = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGB = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGC = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGD = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGE = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGF = 1;
bp = ctx->dc_bios;
diff --git a/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c
index 950c505cde66..6e6bd9c9568d 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c
@@ -1206,13 +1206,6 @@ static bool construct(
* Create resources *
*************************************************/
- pool->base.stream_engines.engine.ENGINE_ID_DIGA = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGB = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGC = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGD = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGE = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGF = 1;
-
pool->base.clock_sources[DCE112_CLK_SRC_PLL0] =
dce112_clock_source_create(
ctx, ctx->dc_bios,
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c
index 1e38c9aacdad..d470f5cd0942 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c
@@ -873,13 +873,6 @@ static bool construct(
* Create resources *
*************************************************/
- pool->base.stream_engines.engine.ENGINE_ID_DIGA = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGB = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGC = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGD = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGE = 1;
- pool->base.stream_engines.engine.ENGINE_ID_DIGF = 1;
-
bp = ctx->dc_bios;
if ((bp->funcs->get_firmware_info(bp, &info) == BP_RESULT_OK) &&
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/core_types.h b/drivers/gpu/drm/amd/dal/dc/inc/core_types.h
index 2c0072265d8b..4ed88728a54d 100644
--- a/drivers/gpu/drm/amd/dal/dc/inc/core_types.h
+++ b/drivers/gpu/drm/amd/dal/dc/inc/core_types.h
@@ -251,8 +251,6 @@ struct resource_pool {
unsigned int underlay_pipe_index;
unsigned int stream_enc_count;
- union supported_stream_engines stream_engines;
-
/*
* reserved clock source for DP
*/
@@ -306,7 +304,6 @@ struct pipe_ctx {
struct resource_context {
const struct resource_pool *pool;
struct pipe_ctx pipe_ctx[MAX_PIPES];
- union supported_stream_engines used_stream_engines;
bool is_stream_enc_acquired[MAX_PIPES * 2];
bool is_audio_acquired[MAX_PIPES];
uint8_t clock_source_ref_count[MAX_CLOCK_SOURCES];
diff --git a/drivers/gpu/drm/amd/dal/include/grph_object_id.h b/drivers/gpu/drm/amd/dal/include/grph_object_id.h
index 9ad7620e8ee8..e4aa4ddf9d2a 100644
--- a/drivers/gpu/drm/amd/dal/include/grph_object_id.h
+++ b/drivers/gpu/drm/amd/dal/include/grph_object_id.h
@@ -190,22 +190,6 @@ enum engine_id {
ENGINE_ID_UNKNOWN = (-1L)
};
-union supported_stream_engines {
- struct {
- uint32_t ENGINE_ID_DIGA:1;
- uint32_t ENGINE_ID_DIGB:1;
- uint32_t ENGINE_ID_DIGC:1;
- uint32_t ENGINE_ID_DIGD:1;
- uint32_t ENGINE_ID_DIGE:1;
- uint32_t ENGINE_ID_DIGF:1;
- uint32_t ENGINE_ID_DIGG:1;
- uint32_t ENGINE_ID_DACA:1;
- uint32_t ENGINE_ID_DACB:1;
- uint32_t ENGINE_ID_VCE:1;
- } engine;
- uint32_t u_all;
-};
-
enum transmitter_color_depth {
TRANSMITTER_COLOR_DEPTH_24 = 0, /* 8 bits */
TRANSMITTER_COLOR_DEPTH_30, /* 10 bits */
--
2.10.1
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