[PATCH 2/2] drm/amd/powerplay: disable cg pg task when pp uninitialize.

Deucher, Alexander Alexander.Deucher at amd.com
Tue Nov 29 13:05:39 UTC 2016


> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Tuesday, November 29, 2016 6:24 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH 2/2] drm/amd/powerplay: disable cg pg task when pp
> uninitialize.
> 
> fix bug on uvd pg enabled, when reboot vm in pass through case,
> we need to notify smu power up uvd/vce if they were power down.
> otherwise, the vbios post will fail.
> 
> Change-Id: I5df801ab0f6105be550fbbbd98dbf8329357784a
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>

For the series:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c   |  2 +-
>  drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 13
> +++++++++++++
>  drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h   |  1 +
>  3 files changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c
> b/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c
> index b6f45fd..ec36c0e 100644
> --- a/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c
> +++ b/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c
> @@ -154,7 +154,7 @@ int pem_task_powerdown_vce_tasks(struct
> pp_eventmgr *eventmgr, struct pem_event_
> 
>  int pem_task_disable_clock_power_gatings_tasks(struct pp_eventmgr
> *eventmgr, struct pem_event_data *event_data)
>  {
> -	/* TODO */
> +	phm_disable_clock_power_gatings(eventmgr->hwmgr);
>  	return 0;
>  }
> 
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> index 0723758..c355a0f 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> @@ -209,6 +209,19 @@ int phm_enable_clock_power_gatings(struct
> pp_hwmgr *hwmgr)
>  	return 0;
>  }
> 
> +int phm_disable_clock_power_gatings(struct pp_hwmgr *hwmgr)
> +{
> +	PHM_FUNC_CHECK(hwmgr);
> +
> +	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
> +		PHM_PlatformCaps_TablelessHardwareInterface)) {
> +		if (NULL != hwmgr->hwmgr_func-
> >disable_clock_power_gating)
> +			return hwmgr->hwmgr_func-
> >disable_clock_power_gating(hwmgr);
> +	}
> +	return 0;
> +}
> +
> +
>  int phm_display_configuration_changed(struct pp_hwmgr *hwmgr)
>  {
>  	PHM_FUNC_CHECK(hwmgr);
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
> b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
> index d449583..2612997 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
> @@ -334,6 +334,7 @@ struct phm_clocks {
>  	uint32_t clock[MAX_NUM_CLOCKS];
>  };
> 
> +extern int phm_disable_clock_power_gatings(struct pp_hwmgr *hwmgr);
>  extern int phm_enable_clock_power_gatings(struct pp_hwmgr *hwmgr);
>  extern int phm_powergate_uvd(struct pp_hwmgr *hwmgr, bool gate);
>  extern int phm_powergate_vce(struct pp_hwmgr *hwmgr, bool gate);
> --
> 1.9.1
> 
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