[PATCH] drm/amd/powerplay: notify smu no display by default.

[Alex Deucher]

On Thu, Oct 13, 2016 at 3:39 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> Change-Id: Id6c2046bedd99f17c23b37e2fbf38975482dbfb8
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> index d6a4329..ca0413a 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> @@ -1228,7 +1228,7 @@ static int smu7_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
>         PP_ASSERT_WITH_CODE((0 == tmp_result),
>                         "Failed to enable VR hot GPIO interrupt!", result = tmp_result);
>
> -       smum_send_msg_to_smc(hwmgr->smumgr, (PPSMC_Msg)PPSMC_HasDisplay);
> +       smum_send_msg_to_smc(hwmgr->smumgr, (PPSMC_Msg)PPSMC_NoDisplay);
>
>         tmp_result = smu7_enable_sclk_control(hwmgr);
>         PP_ASSERT_WITH_CODE((0 == tmp_result),
> --
> 1.9.1
>
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