[PATCH 1/7] drm/amdgpu: check min clock set by DAL before set ps.

Deucher, Alexander Alexander.Deucher at amd.com
Fri Oct 14 15:38:47 UTC 2016


Up to you; whichever you think is easier.

Alex

From: Zhu, Rex
Sent: Friday, October 14, 2016 11:27 AM
To: Deucher, Alexander; amd-gfx at lists.freedesktop.org
Subject: Re: [PATCH 1/7] drm/amdgpu: check min clock set by DAL before set ps.


Ok. i will add CI support in powerplay next week.



Best Regards

Rex

________________________________
From: Deucher, Alexander
Sent: Friday, October 14, 2016 9:42:42 PM
To: Zhu, Rex; amd-gfx at lists.freedesktop.org<mailto:amd-gfx at lists.freedesktop.org>
Cc: Zhu, Rex
Subject: RE: [PATCH 1/7] drm/amdgpu: check min clock set by DAL before set ps.

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Friday, October 14, 2016 8:07 AM
> To: amd-gfx at lists.freedesktop.org<mailto:amd-gfx at lists.freedesktop.org>
> Cc: Zhu, Rex
> Subject: [PATCH 1/7] drm/amdgpu: check min clock set by DAL before set ps.
>
> Change-Id: Id71b9a3329a8a143a189b275926b0a2054bf0bb8

Series is:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com<mailto:alexander.deucher at amd.com>>

For CI, I wonder if it would be better to add support for it to the powerplay smu7 module since it's pretty similar to the other smu7 dGPUs.

Alex

> ---
>  drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
> b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
> index 1d8c375..fd2fe85 100644
> --- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
> @@ -960,6 +960,12 @@ static void ci_apply_state_adjust_rules(struct
> amdgpu_device *adev,
>                sclk = ps->performance_levels[0].sclk;
>        }
>
> +     if (adev->pm.pm_display_cfg.min_core_set_clock > sclk)
> +             sclk = adev->pm.pm_display_cfg.min_core_set_clock;
> +
> +     if (adev->pm.pm_display_cfg.min_mem_set_clock > mclk)
> +             mclk = adev->pm.pm_display_cfg.min_mem_set_clock;
> +
>        if (rps->vce_active) {
>                if (sclk < adev->pm.dpm.vce_states[adev-
> >pm.dpm.vce_level].sclk)
>                        sclk = adev->pm.dpm.vce_states[adev-
> >pm.dpm.vce_level].sclk;
> --
> 1.9.1
>
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