[PATCH 1/6] drm/amdgpu: when suspend, set boot state instand of disable dpm.
Alex Deucher
alexdeucher at gmail.com
Wed Oct 26 15:04:09 UTC 2016
On Wed, Oct 26, 2016 at 7:00 AM, Christian König
<deathsimple at vodafone.de> wrote:
> Patch #1-#4 are Acked-by: Christian König <christian.koenig at amd.com>.
>
> You already send a v2 for patch #5.
>
> Where is patch #6 in this series?
Strangely, I didn't get it either, but it showed up in the archives. Anyway,
Patches 1-4, 5(v2), 6:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
>
> Regards,
> Christian.
>
>
> Am 26.10.2016 um 12:21 schrieb Rex Zhu:
>>
>> fix pm-hibernat bug, when suspend/resume, dpm start failed.
>>
>> Change-Id: I0ec39c72b9c38778c01f88283caa14f115db8f4c
>> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 2 ++
>> drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 17 +++++++++++++----
>> 2 files changed, 15 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
>> index e5e0a9a..bd85e35 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
>> @@ -404,6 +404,8 @@ struct amdgpu_dpm {
>> enum amd_vce_level vce_level;
>> enum amd_pm_state_type state;
>> enum amd_pm_state_type user_state;
>> + enum amd_pm_state_type last_state;
>> + enum amd_pm_state_type last_user_state;
>> u32 platform_caps;
>> u32 voltage_response_time;
>> u32 backbias_response_time;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
>> b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
>> index dffe08e..34e5b67 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
>> @@ -6347,12 +6347,19 @@ static int ci_dpm_suspend(void *handle)
>> if (adev->pm.dpm_enabled) {
>> mutex_lock(&adev->pm.mutex);
>> - /* disable dpm */
>> - ci_dpm_disable(adev);
>> - /* reset the power state */
>> - adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps =
>> adev->pm.dpm.boot_ps;
>> + amdgpu_irq_put(adev, &adev->pm.dpm.thermal.irq,
>> + AMDGPU_THERMAL_IRQ_LOW_TO_HIGH);
>> + amdgpu_irq_put(adev, &adev->pm.dpm.thermal.irq,
>> + AMDGPU_THERMAL_IRQ_HIGH_TO_LOW);
>> + adev->pm.dpm.last_user_state = adev->pm.dpm.user_state;
>> + adev->pm.dpm.last_state = adev->pm.dpm.state;
>> + adev->pm.dpm.user_state = POWER_STATE_TYPE_INTERNAL_BOOT;
>> + adev->pm.dpm.state = POWER_STATE_TYPE_INTERNAL_BOOT;
>> mutex_unlock(&adev->pm.mutex);
>> + amdgpu_pm_compute_clocks(adev);
>> +
>> }
>> +
>> return 0;
>> }
>> @@ -6370,6 +6377,8 @@ static int ci_dpm_resume(void *handle)
>> adev->pm.dpm_enabled = false;
>> else
>> adev->pm.dpm_enabled = true;
>> + adev->pm.dpm.user_state = adev->pm.dpm.last_user_state;
>> + adev->pm.dpm.state = adev->pm.dpm.last_state;
>> mutex_unlock(&adev->pm.mutex);
>> if (adev->pm.dpm_enabled)
>> amdgpu_pm_compute_clocks(adev);
>
>
>
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