[PATCH] drm/i915: Before pageflip, also wait for shared dmabuf fences.

[Daniel Vetter]

On Wed, Sep 21, 2016 at 06:23:35PM +0200, Christian König wrote:
> For a quick workaround I suggest to just serialize all accesses to BO shared
> with different drivers, but essentially I think it is a perfectly valid
> requirement to have multiple writers to one BO.

It is, but it's not possible with implicit sync. If you want parallel
write access to the same shared buffer, you _must_ carry around some
explicit fences. Within amdgpu you can use driver-specific cookies, for
shared buffer we now have sync_file. But multiple writers with implicit
sync simply fundamentally doesn't work. Because you have no idea with which
writer, touching the same subrange you want to touch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch