[PATCH] drm/amdgpu: cleanup get_invalidate_req v2

Deucher, Alexander Alexander.Deucher at amd.com
Tue Apr 4 15:41:33 UTC 2017


> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Tuesday, April 04, 2017 10:20 AM
> To: amd-gfx at lists.freedesktop.org
> Subject: [PATCH] drm/amdgpu: cleanup get_invalidate_req v2
> 
> From: Christian König <christian.koenig at amd.com>
> 
> The two hubs are just instances of the same hardware,
> so the register bits are identical.
> 
> v2: keep the function pointer

Having the callback in the hub seems like a more natural fit in case the hubs ever have different invalidation formats, but I guess that is not likely and if that ever comes to be, we'd probably need additional changes anyway.

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> 
> Signed-off-by: Christian König <christian.koenig at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h      |  2 +-
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c    |  2 +-
>  drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 21 ---------------------
>  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c    | 22
> +++++++++++++++++++++-
>  drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 21 ---------------------
>  drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c   |  2 +-
>  drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c    |  4 ++--
>  drivers/gpu/drm/amd/amdgpu/vce_v4_0.c    |  2 +-
>  8 files changed, 27 insertions(+), 49 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 0c89e6b..da628f8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -308,6 +308,7 @@ struct amdgpu_gart_funcs {
>  				     uint32_t flags);
>  	/* adjust mc addr in fb for APU case */
>  	u64 (*adjust_mc_addr)(struct amdgpu_device *adev, u64 addr);
> +	uint32_t (*get_invalidate_req)(unsigned int vm_id);
>  };
> 
>  /* provided by the ih block */
> @@ -572,7 +573,6 @@ struct amdgpu_vmhub {
>  	uint32_t	vm_context0_cntl;
>  	uint32_t	vm_l2_pro_fault_status;
>  	uint32_t	vm_l2_pro_fault_cntl;
> -	uint32_t	(*get_invalidate_req)(unsigned int vm_id);
>  };
> 
>  /*
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index c8a1c4e..a967879 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -3148,6 +3148,7 @@ static void gfx_v9_0_ring_emit_vm_flush(struct
> amdgpu_ring *ring,
>  					unsigned vm_id, uint64_t pd_addr)
>  {
>  	int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);
> +	uint32_t req = ring->adev->gart.gart_funcs-
> >get_invalidate_req(vm_id);
>  	unsigned eng = ring->idx;
>  	unsigned i;
> 
> @@ -3157,7 +3158,6 @@ static void gfx_v9_0_ring_emit_vm_flush(struct
> amdgpu_ring *ring,
> 
>  	for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
>  		struct amdgpu_vmhub *hub = &ring->adev->vmhub[i];
> -		uint32_t req = hub->get_invalidate_req(vm_id);
> 
>  		gfx_v9_0_write_data_to_reg(ring, usepfp, true,
>  					   hub->ctx0_ptb_addr_lo32
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> index b808d4c..76b56f8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> @@ -299,25 +299,6 @@ void gfxhub_v1_0_set_fault_enable_default(struct
> amdgpu_device *adev,
>  	WREG32(SOC15_REG_OFFSET(GC, 0,
> mmVM_L2_PROTECTION_FAULT_CNTL), tmp);
>  }
> 
> -static uint32_t gfxhub_v1_0_get_invalidate_req(unsigned int vm_id)
> -{
> -	u32 req = 0;
> -
> -	/* invalidate using legacy mode on vm_id*/
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> -			    PER_VMID_INVALIDATE_REQ, 1 << vm_id);
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> FLUSH_TYPE, 0);
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> INVALIDATE_L2_PTES, 1);
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> INVALIDATE_L2_PDE0, 1);
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> INVALIDATE_L2_PDE1, 1);
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> INVALIDATE_L2_PDE2, 1);
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> INVALIDATE_L1_PTES, 1);
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> -			    CLEAR_PROTECTION_FAULT_STATUS_ADDR,	0);
> -
> -	return req;
> -}
> -
>  static int gfxhub_v1_0_early_init(void *handle)
>  {
>  	return 0;
> @@ -350,8 +331,6 @@ static int gfxhub_v1_0_sw_init(void *handle)
>  	hub->vm_l2_pro_fault_cntl =
>  		SOC15_REG_OFFSET(GC, 0,
> mmVM_L2_PROTECTION_FAULT_CNTL);
> 
> -	hub->get_invalidate_req = gfxhub_v1_0_get_invalidate_req;
> -
>  	return 0;
>  }
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index d813723..b473c65 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -173,6 +173,25 @@ static void gmc_v9_0_set_irq_funcs(struct
> amdgpu_device *adev)
>  	adev->mc.vm_fault.funcs = &gmc_v9_0_irq_funcs;
>  }
> 
> +static uint32_t gmc_v9_0_get_invalidate_req(unsigned int vm_id)
> +{
> +	u32 req = 0;
> +
> +	/* invalidate using legacy mode on vm_id*/
> +	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> +			    PER_VMID_INVALIDATE_REQ, 1 << vm_id);
> +	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> FLUSH_TYPE, 0);
> +	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> INVALIDATE_L2_PTES, 1);
> +	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> INVALIDATE_L2_PDE0, 1);
> +	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> INVALIDATE_L2_PDE1, 1);
> +	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> INVALIDATE_L2_PDE2, 1);
> +	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> INVALIDATE_L1_PTES, 1);
> +	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> +			    CLEAR_PROTECTION_FAULT_STATUS_ADDR,	0);
> +
> +	return req;
> +}
> +
>  /*
>   * GART
>   * VMID 0 is the physical GPU addresses as used by the kernel.
> @@ -202,7 +221,7 @@ static void gmc_v9_0_gart_flush_gpu_tlb(struct
> amdgpu_device *adev,
> 
>  	for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
>  		struct amdgpu_vmhub *hub = &adev->vmhub[i];
> -		u32 tmp = hub->get_invalidate_req(vmid);
> +		u32 tmp = gmc_v9_0_get_invalidate_req(vmid);
> 
>  		WREG32_NO_KIQ(hub->vm_inv_eng0_req + eng, tmp);
> 
> @@ -345,6 +364,7 @@ static const struct amdgpu_gart_funcs
> gmc_v9_0_gart_funcs = {
>  	.set_pte_pde = gmc_v9_0_gart_set_pte_pde,
>  	.get_vm_pte_flags = gmc_v9_0_get_vm_pte_flags,
>  	.adjust_mc_addr = gmc_v9_0_adjust_mc_addr,
> +	.get_invalidate_req = gmc_v9_0_get_invalidate_req,
>  };
> 
>  static void gmc_v9_0_set_gart_funcs(struct amdgpu_device *adev)
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> index a065b43..c67c33f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> @@ -317,25 +317,6 @@ void mmhub_v1_0_set_fault_enable_default(struct
> amdgpu_device *adev, bool value)
>  	WREG32(SOC15_REG_OFFSET(MMHUB, 0,
> mmVM_L2_PROTECTION_FAULT_CNTL), tmp);
>  }
> 
> -static uint32_t mmhub_v1_0_get_invalidate_req(unsigned int vm_id)
> -{
> -	u32 req = 0;
> -
> -	/* invalidate using legacy mode on vm_id*/
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> -			    PER_VMID_INVALIDATE_REQ, 1 << vm_id);
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> FLUSH_TYPE, 0);
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> INVALIDATE_L2_PTES, 1);
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> INVALIDATE_L2_PDE0, 1);
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> INVALIDATE_L2_PDE1, 1);
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> INVALIDATE_L2_PDE2, 1);
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> INVALIDATE_L1_PTES, 1);
> -	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
> -			    CLEAR_PROTECTION_FAULT_STATUS_ADDR,	0);
> -
> -	return req;
> -}
> -
>  static int mmhub_v1_0_early_init(void *handle)
>  {
>  	return 0;
> @@ -368,8 +349,6 @@ static int mmhub_v1_0_sw_init(void *handle)
>  	hub->vm_l2_pro_fault_cntl =
>  		SOC15_REG_OFFSET(MMHUB, 0,
> mmVM_L2_PROTECTION_FAULT_CNTL);
> 
> -	hub->get_invalidate_req = mmhub_v1_0_get_invalidate_req;
> -
>  	return 0;
>  }
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index 6cfb100..d40eb31 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -1039,6 +1039,7 @@ static void
> sdma_v4_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
>  static void sdma_v4_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
>  					 unsigned vm_id, uint64_t pd_addr)
>  {
> +	uint32_t req = ring->adev->gart.gart_funcs-
> >get_invalidate_req(vm_id);
>  	unsigned eng = ring->idx;
>  	unsigned i;
> 
> @@ -1048,7 +1049,6 @@ static void sdma_v4_0_ring_emit_vm_flush(struct
> amdgpu_ring *ring,
> 
>  	for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
>  		struct amdgpu_vmhub *hub = &ring->adev->vmhub[i];
> -		uint32_t req = hub->get_invalidate_req(vm_id);
> 
>  		amdgpu_ring_write(ring,
> SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |
> 
> SDMA_PKT_SRBM_WRITE_HEADER_BYTE_EN(0xf));
> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
> b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
> index 6024aef..819148a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
> @@ -1034,6 +1034,7 @@ static void uvd_v7_0_vm_reg_wait(struct
> amdgpu_ring *ring,
>  static void uvd_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
>  					unsigned vm_id, uint64_t pd_addr)
>  {
> +	uint32_t req = ring->adev->gart.gart_funcs-
> >get_invalidate_req(vm_id);
>  	uint32_t data0, data1, mask;
>  	unsigned eng = ring->idx;
>  	unsigned i;
> @@ -1044,7 +1045,6 @@ static void uvd_v7_0_ring_emit_vm_flush(struct
> amdgpu_ring *ring,
> 
>  	for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
>  		struct amdgpu_vmhub *hub = &ring->adev->vmhub[i];
> -		uint32_t req = hub->get_invalidate_req(vm_id);
> 
>  		data0 = (hub->ctx0_ptb_addr_hi32 + vm_id * 2) << 2;
>  		data1 = upper_32_bits(pd_addr);
> @@ -1080,6 +1080,7 @@ static void uvd_v7_0_enc_ring_insert_end(struct
> amdgpu_ring *ring)
>  static void uvd_v7_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
>  			 unsigned int vm_id, uint64_t pd_addr)
>  {
> +	uint32_t req = ring->adev->gart.gart_funcs-
> >get_invalidate_req(vm_id);
>  	unsigned eng = ring->idx;
>  	unsigned i;
> 
> @@ -1089,7 +1090,6 @@ static void
> uvd_v7_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
> 
>  	for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
>  		struct amdgpu_vmhub *hub = &ring->adev->vmhub[i];
> -		uint32_t req = hub->get_invalidate_req(vm_id);
> 
>  		amdgpu_ring_write(ring, HEVC_ENC_CMD_REG_WRITE);
>  		amdgpu_ring_write(ring,
> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> index ae9a93c..8dde83f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> @@ -973,6 +973,7 @@ static void vce_v4_0_ring_insert_end(struct
> amdgpu_ring *ring)
>  static void vce_v4_0_emit_vm_flush(struct amdgpu_ring *ring,
>  			 unsigned int vm_id, uint64_t pd_addr)
>  {
> +	uint32_t req = ring->adev->gart.gart_funcs-
> >get_invalidate_req(vm_id);
>  	unsigned eng = ring->idx;
>  	unsigned i;
> 
> @@ -982,7 +983,6 @@ static void vce_v4_0_emit_vm_flush(struct
> amdgpu_ring *ring,
> 
>  	for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
>  		struct amdgpu_vmhub *hub = &ring->adev->vmhub[i];
> -		uint32_t req = hub->get_invalidate_req(vm_id);
> 
>  		amdgpu_ring_write(ring, VCE_CMD_REG_WRITE);
>  		amdgpu_ring_write(ring,
> --
> 2.5.0
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx


More information about the amd-gfx mailing list