[PATCH 10/10] drm/amd/amdgpu: cleanup gfx_v9_0_gpu_init()
Alex Deucher
alexdeucher at gmail.com
Wed Apr 5 18:08:41 UTC 2017
On Wed, Apr 5, 2017 at 9:26 AM, Tom St Denis <tom.stdenis at amd.com> wrote:
> Use new WREG32_FIELD15 macro
>
> Signed-off-by: Tom St Denis <tom.stdenis at amd.com>
Series is:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 2dd32466919d..33df0dbe7052 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1288,9 +1288,7 @@ static void gfx_v9_0_gpu_init(struct amdgpu_device *adev)
> u32 tmp;
> int i;
>
> - tmp = RREG32(SOC15_REG_OFFSET(GC, 0, mmGRBM_CNTL));
> - tmp = REG_SET_FIELD(tmp, GRBM_CNTL, READ_TIMEOUT, 0xff);
> - WREG32(SOC15_REG_OFFSET(GC, 0, mmGRBM_CNTL), tmp);
> + WREG32_FIELD15(GC, 0, GRBM_CNTL, READ_TIMEOUT, 0xff);
>
> gfx_v9_0_tiling_mode_table_init(adev);
>
> --
> 2.12.0
>
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