[PATCH] drm/amdgpu: Add kernel parameter to manage memory error handling.

[Michel Dänzer]

Hi Dave,


Please send patches inline instead of as attachments, ideally using git
send-email.


> @@ -212,6 +213,9 @@ module_param_named(cg_mask, amdgpu_cg_mask, uint, 0444);
>  MODULE_PARM_DESC(pg_mask, "Powergating flags mask (0 = disable power gating)");
>  module_param_named(pg_mask, amdgpu_pg_mask, uint, 0444);
>  
> +MODULE_PARM_DESC(ecc_mask, "ECC/EDC flags mask (0 = disable ECC/EDC)");

"0 = disable ECC/EDC" implies that they're enabled by default? Was that
already the case before this patch?


> @@ -1664,6 +1664,24 @@ static int gfx_v8_0_do_edc_gpr_workarounds(struct amdgpu_device *adev)
>  	if (adev->asic_type != CHIP_CARRIZO)
>  		return 0;
>  
> +	DRM_INFO("gfx_v8_0_do_edc_gpr_workarounds(): ecc_flags: 0x%08x\n",
> +		 adev->ecc_flags);
> +
> +	/*
> +	 * Check if EDC has been requested.
> +	 * For Carrizo, EDC is the best/safest mode WRT error handling.
> +	 */
> +	if (!(adev->ecc_flags
> +	      & (AMD_ECC_SUPPORT_BEST | AMD_ECC_SUPPORT_EDC))) {
> +		DRM_INFO("gfx_v8_0_do_edc_gpr_workarounds(): "
> +			 "skipping workarounds and not enabling EDC.\n");
> +
> +		return 0;
> +	}
> +
> +	DRM_INFO("gfx_v8_0_do_edc_gpr_workarounds(): "
> +		 "running workarounds and enabling EDC.\n");

These DRM_INFOs are too chatty, maybe make them e.g. DRM_DEBUG_DRIVER.


-- 
Earthling Michel Dänzer               |               http://www.amd.com
Libre software enthusiast             |             Mesa and X developer