[PATCH 01/12] drm/amdgpu/gfx9: fix typo in mpd init
Andres Rodriguez
andresx7 at gmail.com
Tue Apr 18 17:00:55 UTC 2017
s/mpd/mqd in subject
On 2017-04-17 06:00 PM, Alex Deucher wrote:
> Using the wrong macro for soc15 register access.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 87596e4..6b91805 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1989,12 +1989,12 @@ static int gfx_v9_0_mqd_init(struct amdgpu_ring *ring)
>
> /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */
> ring->wptr = 0;
> - mqd->cp_hqd_pq_rptr = RREG32(mmCP_HQD_PQ_RPTR);
> + mqd->cp_hqd_pq_rptr = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR);
>
> /* set the vmid for the queue */
> mqd->cp_hqd_vmid = 0;
>
> - tmp = RREG32(mmCP_HQD_PERSISTENT_STATE);
> + tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PERSISTENT_STATE);
> tmp = REG_SET_FIELD(tmp, CP_HQD_PERSISTENT_STATE, PRELOAD_SIZE, 0x53);
> mqd->cp_hqd_persistent_state = tmp;
>
>
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