[PATCH] drm/amdgpu: extend vm flags to 64-bit in tracepoint

[Zhang, Jerry (Junwei)]

On 04/24/2017 04:56 PM, Christian König wrote:
> Am 24.04.2017 um 10:55 schrieb Christian König:
>> Am 24.04.2017 um 08:43 schrieb Junwei Zhang:
>>> Signed-off-by: Junwei Zhang <Jerry.Zhang at amd.com>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 18 +++++++++---------
>>>   1 file changed, 9 insertions(+), 9 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
>>> index 8676eff..998ff4d 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
>>> @@ -221,7 +221,7 @@
>>>                    __field(long, start)
>>>                    __field(long, last)
>>>                    __field(u64, offset)
>>> -                 __field(u32, flags)
>>> +                 __field(u64, flags)
>>>                    ),
>>>             TP_fast_assign(
>>> @@ -231,7 +231,7 @@
>>>                  __entry->offset = mapping->offset;
>>>                  __entry->flags = mapping->flags;
>>>                  ),
>>> -        TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%08x",
>>> +        TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%010llx",
>>
>> The full 64bit flags need to be printed with %016llx.
>>
>> We only use %010llx for the 40bit addresses and even that needs to be
>> extended to %048llx for Vega10.
>
> Ups, hit send to early. That should read "needs to be extended to %012llx for
> Vega10 because it has 48bit addresses".

You reminder me that the flags may be printed as:
   - flags: %015llx (58-bit at most for vega10)

About the address, like offset/soffs/eoffs/pe/addr, need to be
   - addr: %012llx (48-bit)

How do you think about it?

BTW, anyway it turns out to print the correct result, even if the format is 
less than the output.

Jerry

>
> Christian.
>
>>
>> With that fixed the patch is Reviewed-by: Christian König
>> <christian.koenig at amd.com>
>>
>> Regards,
>> Christian.
>>
>>>                 __entry->bo, __entry->start, __entry->last,
>>>                 __entry->offset, __entry->flags)
>>>   );
>>> @@ -245,7 +245,7 @@
>>>                    __field(long, start)
>>>                    __field(long, last)
>>>                    __field(u64, offset)
>>> -                 __field(u32, flags)
>>> +                 __field(u64, flags)
>>>                    ),
>>>             TP_fast_assign(
>>> @@ -255,7 +255,7 @@
>>>                  __entry->offset = mapping->offset;
>>>                  __entry->flags = mapping->flags;
>>>                  ),
>>> -        TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%08x",
>>> +        TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%010llx",
>>>                 __entry->bo, __entry->start, __entry->last,
>>>                 __entry->offset, __entry->flags)
>>>   );
>>> @@ -266,7 +266,7 @@
>>>           TP_STRUCT__entry(
>>>                    __field(u64, soffset)
>>>                    __field(u64, eoffset)
>>> -                 __field(u32, flags)
>>> +                 __field(u64, flags)
>>>                    ),
>>>             TP_fast_assign(
>>> @@ -274,7 +274,7 @@
>>>                  __entry->eoffset = mapping->it.last + 1;
>>>                  __entry->flags = mapping->flags;
>>>                  ),
>>> -        TP_printk("soffs=%010llx, eoffs=%010llx, flags=%08x",
>>> +        TP_printk("soffs=%010llx, eoffs=%010llx, flags=%010llx",
>>>                 __entry->soffset, __entry->eoffset, __entry->flags)
>>>   );
>>>   @@ -290,14 +290,14 @@
>>>     TRACE_EVENT(amdgpu_vm_set_ptes,
>>>           TP_PROTO(uint64_t pe, uint64_t addr, unsigned count,
>>> -             uint32_t incr, uint32_t flags),
>>> +             uint32_t incr, uint64_t flags),
>>>           TP_ARGS(pe, addr, count, incr, flags),
>>>           TP_STRUCT__entry(
>>>                    __field(u64, pe)
>>>                    __field(u64, addr)
>>>                    __field(u32, count)
>>>                    __field(u32, incr)
>>> -                 __field(u32, flags)
>>> +                 __field(u64, flags)
>>>                    ),
>>>             TP_fast_assign(
>>> @@ -307,7 +307,7 @@
>>>                  __entry->incr = incr;
>>>                  __entry->flags = flags;
>>>                  ),
>>> -        TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%08x, count=%u",
>>> +        TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%010Lx, count=%u",
>>>                 __entry->pe, __entry->addr, __entry->incr,
>>>                 __entry->flags, __entry->count)
>>>   );
>>
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx at lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>
>