[PATCH 2/2] drm/amdgpu: move default gart size setting into gmc modules

Christian König deathsimple at vodafone.de
Tue Aug 22 18:54:34 UTC 2017


Reviewed-by: Christian König <christian.koenig at amd.com> for the series 
as well.

Am 22.08.2017 um 20:17 schrieb Felix Kuehling:
> The series is Reviewed-by: Felix Kuehling <Felix.Kuehling at amd.com>
>
>
> On 2017-08-22 01:09 PM, Alex Deucher wrote:
>> Move the asic specific code into the IP modules.
>>
>> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 52 --------------------------------
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h |  1 -
>>   drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c    | 19 +++++++++++-
>>   drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c    | 22 +++++++++++++-
>>   drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c    | 21 ++++++++++++-
>>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c    | 16 +++++++++-
>>   6 files changed, 74 insertions(+), 57 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
>> index 2027eb0..f437008 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
>> @@ -57,58 +57,6 @@
>>    */
>>   
>>   /**
>> - * amdgpu_gart_set_defaults - set the default gart_size
>> - *
>> - * @adev: amdgpu_device pointer
>> - *
>> - * Set the default gart_size based on parameters and available VRAM.
>> - */
>> -void amdgpu_gart_set_defaults(struct amdgpu_device *adev)
>> -{
>> -	u64 gart_size;
>> -
>> -	if (amdgpu_gart_size == -1) {
>> -		switch (adev->asic_type) {
>> -#ifdef CONFIG_DRM_AMDGPU_SI
>> -		case CHIP_HAINAN:    /* no MM engines */
>> -#endif
>> -		case CHIP_TOPAZ:     /* no MM engines */
>> -		case CHIP_POLARIS11: /* all engines support GPUVM */
>> -		case CHIP_POLARIS10: /* all engines support GPUVM */
>> -		case CHIP_POLARIS12: /* all engines support GPUVM */
>> -		case CHIP_VEGA10:    /* all engines support GPUVM */
>> -		default:
>> -			gart_size = 256;
>> -			break;
>> -#ifdef CONFIG_DRM_AMDGPU_SI
>> -		case CHIP_VERDE:    /* UVD, VCE do not support GPUVM */
>> -		case CHIP_TAHITI:   /* UVD, VCE do not support GPUVM */
>> -		case CHIP_PITCAIRN: /* UVD, VCE do not support GPUVM */
>> -		case CHIP_OLAND:    /* UVD, VCE do not support GPUVM */
>> -#endif
>> -#ifdef CONFIG_DRM_AMDGPU_CIK
>> -		case CHIP_BONAIRE: /* UVD, VCE do not support GPUVM */
>> -		case CHIP_HAWAII:  /* UVD, VCE do not support GPUVM */
>> -		case CHIP_KAVERI:  /* UVD, VCE do not support GPUVM */
>> -		case CHIP_KABINI:  /* UVD, VCE do not support GPUVM */
>> -		case CHIP_MULLINS: /* UVD, VCE do not support GPUVM */
>> -#endif
>> -		case CHIP_TONGA:   /* UVD, VCE do not support GPUVM */
>> -		case CHIP_FIJI:    /* UVD, VCE do not support GPUVM */
>> -		case CHIP_CARRIZO: /* UVD, VCE do not support GPUVM, DCE SG support */
>> -		case CHIP_STONEY:  /* UVD does not support GPUVM, DCE SG support */
>> -		case CHIP_RAVEN:   /* DCE SG support */
>> -			gart_size = 1024;
>> -			break;
>> -		}
>> -	} else {
>> -		gart_size = amdgpu_gart_size;
>> -	}
>> -
>> -	adev->mc.gart_size = gart_size << 20;
>> -}
>> -
>> -/**
>>    * amdgpu_gart_table_ram_alloc - allocate system ram for gart page table
>>    *
>>    * @adev: amdgpu_device pointer
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
>> index d4cce69..afbe803 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
>> @@ -56,7 +56,6 @@ struct amdgpu_gart {
>>   	const struct amdgpu_gart_funcs *gart_funcs;
>>   };
>>   
>> -void amdgpu_gart_set_defaults(struct amdgpu_device *adev);
>>   int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev);
>>   void amdgpu_gart_table_ram_free(struct amdgpu_device *adev);
>>   int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev);
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
>> index 6e68579..58fe8cc 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
>> @@ -332,7 +332,24 @@ static int gmc_v6_0_mc_init(struct amdgpu_device *adev)
>>   	adev->mc.real_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;
>>   	adev->mc.visible_vram_size = adev->mc.aper_size;
>>   
>> -	amdgpu_gart_set_defaults(adev);
>> +	/* set the gart size */
>> +	if (amdgpu_gart_size == -1) {
>> +		switch (adev->asic_type) {
>> +		case CHIP_HAINAN:    /* no MM engines */
>> +		default:
>> +			adev->mc.gart_size = 256ULL << 20;
>> +			break;
>> +		case CHIP_VERDE:    /* UVD, VCE do not support GPUVM */
>> +		case CHIP_TAHITI:   /* UVD, VCE do not support GPUVM */
>> +		case CHIP_PITCAIRN: /* UVD, VCE do not support GPUVM */
>> +		case CHIP_OLAND:    /* UVD, VCE do not support GPUVM */
>> +			adev->mc.gart_size = 1024ULL << 20;
>> +			break;
>> +		}
>> +	} else {
>> +		adev->mc.gart_size = (u64)amdgpu_gart_size << 20;
>> +	}
>> +
>>   	gmc_v6_0_vram_gtt_location(adev, &adev->mc);
>>   
>>   	return 0;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
>> index f6acf5a..bcd6c74 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
>> @@ -386,7 +386,27 @@ static int gmc_v7_0_mc_init(struct amdgpu_device *adev)
>>   	if (adev->mc.visible_vram_size > adev->mc.real_vram_size)
>>   		adev->mc.visible_vram_size = adev->mc.real_vram_size;
>>   
>> -	amdgpu_gart_set_defaults(adev);
>> +	/* set the gart size */
>> +	if (amdgpu_gart_size == -1) {
>> +		switch (adev->asic_type) {
>> +		case CHIP_TOPAZ:     /* no MM engines */
>> +		default:
>> +			adev->mc.gart_size = 256ULL << 20;
>> +			break;
>> +#ifdef CONFIG_DRM_AMDGPU_CIK
>> +		case CHIP_BONAIRE: /* UVD, VCE do not support GPUVM */
>> +		case CHIP_HAWAII:  /* UVD, VCE do not support GPUVM */
>> +		case CHIP_KAVERI:  /* UVD, VCE do not support GPUVM */
>> +		case CHIP_KABINI:  /* UVD, VCE do not support GPUVM */
>> +		case CHIP_MULLINS: /* UVD, VCE do not support GPUVM */
>> +			adev->mc.gart_size = 1024ULL << 20;
>> +			break;
>> +#endif
>> +		}
>> +	} else {
>> +		adev->mc.gart_size = (u64)amdgpu_gart_size << 20;
>> +	}
>> +
>>   	gmc_v7_0_vram_gtt_location(adev, &adev->mc);
>>   
>>   	return 0;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
>> index cb224d5..d320118 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
>> @@ -562,7 +562,26 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
>>   	if (adev->mc.visible_vram_size > adev->mc.real_vram_size)
>>   		adev->mc.visible_vram_size = adev->mc.real_vram_size;
>>   
>> -	amdgpu_gart_set_defaults(adev);
>> +	/* set the gart size */
>> +	if (amdgpu_gart_size == -1) {
>> +		switch (adev->asic_type) {
>> +		case CHIP_POLARIS11: /* all engines support GPUVM */
>> +		case CHIP_POLARIS10: /* all engines support GPUVM */
>> +		case CHIP_POLARIS12: /* all engines support GPUVM */
>> +		default:
>> +			adev->mc.gart_size = 256ULL << 20;
>> +			break;
>> +		case CHIP_TONGA:   /* UVD, VCE do not support GPUVM */
>> +		case CHIP_FIJI:    /* UVD, VCE do not support GPUVM */
>> +		case CHIP_CARRIZO: /* UVD, VCE do not support GPUVM, DCE SG support */
>> +		case CHIP_STONEY:  /* UVD does not support GPUVM, DCE SG support */
>> +			adev->mc.gart_size = 1024ULL << 20;
>> +			break;
>> +		}
>> +	} else {
>> +		adev->mc.gart_size = (u64)amdgpu_gart_size << 20;
>> +	}
>> +
>>   	gmc_v8_0_vram_gtt_location(adev, &adev->mc);
>>   
>>   	return 0;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> index 2769c2b..d04d0b1 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> @@ -499,7 +499,21 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
>>   	if (adev->mc.visible_vram_size > adev->mc.real_vram_size)
>>   		adev->mc.visible_vram_size = adev->mc.real_vram_size;
>>   
>> -	amdgpu_gart_set_defaults(adev);
>> +	/* set the gart size */
>> +	if (amdgpu_gart_size == -1) {
>> +		switch (adev->asic_type) {
>> +		case CHIP_VEGA10:  /* all engines support GPUVM */
>> +		default:
>> +			adev->mc.gart_size = 256ULL << 20;
>> +			break;
>> +		case CHIP_RAVEN:   /* DCE SG support */
>> +			adev->mc.gart_size = 1024ULL << 20;
>> +			break;
>> +		}
>> +	} else {
>> +		adev->mc.gart_size = (u64)amdgpu_gart_size << 20;
>> +	}
>> +
>>   	gmc_v9_0_vram_gtt_location(adev, &adev->mc);
>>   
>>   	return 0;
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx




More information about the amd-gfx mailing list