[pull] amdgpu, radeon, and ttm drm-next-4.16

Alex Deucher alexdeucher at gmail.com
Wed Dec 6 19:04:33 UTC 2017


Hi Dave,

First feature request for 4.16.  Highlights:
- RV and Vega header cleanups
- TTM operation context support
- 48 bit GPUVM fixes for Vega/RV
- More smatch fixes
- ECC support for vega10
- Resizeable BAR support
- Multi-display sync support in DC
- SR-IOV fixes
- Various scheduler improvements
- GPU reset fixes and vram lost tracking
- Clean up DC/powerplay interfaces
- DCN display fixes
- Various DC fixes

The following changes since commit ca797d29cd63e7b71b4eea29aff3b1cefd1ecb59:

  Merge tag 'drm-intel-next-2017-11-17-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-next (2017-12-04 10:56:53 +1000)

are available in the git repository at:

  git://people.freedesktop.org/~agd5f/linux drm-next-4.16

for you to fetch changes up to 3997eea57caf542e9327df9b6bb2882a57c4c421:

  drm/radeon: Use drm_fb_helper_lastclose() and _poll_changed() (2017-12-06 12:48:34 -0500)

----------------------------------------------------------------
Alex Deucher (5):
      drm/amd/display: add mod_freesync_user_enable to dm_connector_state
      drm/amdgpu/gfx8: use cached values for raster config in clear state
      drm/amdgpu/gfx7: use cached values for raster config in clear state
      drm/amdgpu/gfx6: use cached values for raster config in clear state
      drm/amdgpu/gmc9: make some ECC messages debug only

Andrew Jiang (10):
      drm/amd/display: Reject PPLib clock values if they are invalid
      drm/amd/display: Don't use dc_link in link_encoder
      drm/amd/display: Report pitch_alignment for DCN
      drm/amd/display: Loosen plane_info and scaling_info checks
      drm/amd/display: Remove legacy unused workaround
      drm/amd/display: Add update flags in to determine surface update type
      drm/amd/display: Rename pitch_alignment to linear_pitch_alignment
      drm/amd/display: Add check update surfaces for stream wrapper
      drm/amd/display: Set full update flag in dcn_validate_bandwidth
      drm/amd/display: Set OPP default values in init_hw

Andrey Grodzovsky (6):
      drm/amdgpu: Avoid accessing job->entity after the job is scheduled.
      drm/amdgpu: Add SPSC queue to scheduler.
      drm/amdgpu: Fix deadlock during GPU reset.
      drm/amdgpu: Remove job->s_entity to avoid keeping reference to stale pointer.
      drm/amdgpu: Implement BO size validation V2
      drm/amdgpu: Get rid of dep_sync as a seperate object.

Anthony Koo (4):
      drm/amd/display: Add APU cap in dc_caps
      drm/amd/display: DMCU FW loading from PSP
      drm/amd/display: Move hdr_metadata from plane to stream
      drm/amd/display: DMCU and ABM maintenance and refactor

Arun Pandey (1):
      drm/amd/display: Added Opp and Diags Interface for P to I

Bhawanpreet Lakha (1):
      drm/amd/display: Atomic freesync ASSERT fix

Charlene Liu (2):
      drm/amd/display: correct DP is always in full range or bt609
      drm/amd/display: Do post_update_surfaces on new state

Christian König (51):
      drm/amdgpu: use the actual placement for pin accounting
      drm/amdgpu: always bind pinned BOs
      drm/amdgpu: fix pin domain compatibility check
      drm/amdgpu: don't wait interruptible while binding GART space
      drm/amdgpu: remove extra parameter from amdgpu_ttm_bind() v2
      drm/amdgpu: fix indentation in amdgpu_display.h
      drm/amdgpu: nuke amdgpu_ttm_is_bound() v2
      drm/amdgpu: move GART recovery into GTT manager v2
      drm/amdgpu: resize VRAM BAR for CPU access v6
      drm/amdgpu: rename amdgpu_ttm_bind to amdgpu_ttm_alloc_gart
      drm/amdgpu: don't use ttm_bo_move_ttm in amdgpu_ttm_bind v2
      drm/ttm: move unlocking out of ttm_bo_cleanup_memtype_use
      drm/ttm: consistently use reservation_object_unlock
      drm/ttm: user reservation object wrappers v2
      drm/ttm: remove ttm_bo_unreserve_ticket
      drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE result
      drm/amdgpu: cleanup vm_size handling
      drm/ttm: make unlocking in ttm_bo_cleanup_refs optional v3
      drm/ttm: optimize ttm_mem_evict_first v5
      drm/amdgpu: require a root bus window above 4GB for BAR resize
      drm/ttm: fix ttm_mem_evict_first once more
      drm/ttm: completely rework ttm_bo_delayed_delete
      drm/ttm: cleanup coding style in ttm_bo_api.h
      drm/ttm: cleanup ttm_bo_driver.h
      drm/ttm: remove cur_placement
      drm/amdgpu: always make gart.table_addr 64bit
      drm/amdgpu: remove VRAM size reduction v2
      drm/amdgpu: align GTT start to 4GB v2
      drm/amdgpu: fix VCE buffer placement restrictions v2
      drm/ttm: add operation ctx to ttm_bo_validate v2
      drm/ttm: use an operation ctx for ttm_bo_init_reserved
      drm/ttm: use an operation context for ttm_bo_mem_space v2
      drm/ttm: use the operation context inside TTM
      drm/ttm: add context to driver move callback as well
      drm/ttm: add number of bytes moved to the operation context
      staging: vboxvideo: adapt to new TTM interface
      drm/amdgpu: forward operation context to ttm_bo_mem_space
      drm/amdgpu: use the new TTM bytes moved counter v2
      drm/amdgpu: fix VA hole handling on Vega10 v3
      drm/amdgpu: use dev_dbg instead of dev_err in the VA IOCTL
      drm/amdgpu: expose the VA above the hole to userspace
      drm/amdgpu: fix VM PD addr shift
      drm/amdgpu: fix amdgpu_vm_num_entries
      drm/amdgpu: unify VM size handling of Vega10 with older generation
      drm/amdgpu: choose number of VM levels based on VM size
      drm/amdgpu: allow non pot VM size values
      drm/amdgpu: move validation of the VM size into the VM code
      drm/amdgpu: allow specifying vm_block_size for multi level PDs v2
      drm/ttm: swap consecutive allocated cached pages v3
      drm/amdgpu: fix amdgpu_sync_resv v2
      drm/ttm: swap consecutive allocated pooled pages v4

Chunming Zhou (3):
      drm/amd/scheduler: fix page protection of cb
      drm/amd/scheduler: add WARN_ON for s_fence->parent
      drm/amdgpu: use dep_sync for CS dependency/syncobj

Colin Ian King (2):
      drm/amdgpu/virt: remove redundant variable pf2vf_ver
      drm/amd/display: remove unnecessary cast and use kcalloc instead of kzalloc

David Panariti (2):
      drm/amdgpu: New header for fields needed to determine state of ECC.
      drm/amdgpu: Add ability to determine and report if board supports ECC.

Dmytro Laktyushkin (9):
      drm/amd/display: cache pwl params and scl_data to avoid extra programming
      drm/amd/display: fix regamma programming
      drm/amd/display: fix uninitialized variable warning
      drm/amd/display: remove unnecessary waits in dcn10
      drm/amd/display: add warning on long reg_wait
      drm/amd/display: remove dcn10 wait on tg unlock
      drm/amd/display: fix mpo validation failure
      drm/amd/display: fix refclk conversion from khz int to mhz float
      drm/amd/display: Rename output_bpc to opp_input_bpc

Eric Bernstein (3):
      drm/amd/display: Call ipp_program_bias_and_scale only if available
      drm/amd/display: Add OPP DPG blank function
      drm/amd/display: Remove unused OPP functions from interface

Eric Yang (3):
      drm/amd/display: get remote dpcd caps for timing validation
      drm/amd/display: always call set output tf
      drm/amd/display: combine output signal and signal

Ernst Sjöstrand (5):
      drm/amd/powerplay: Minor fixes in processpptables.c (v2)
      drm/amd/powerplay: Fix missing newlines at end of file
      drm/amd/amdgpu: Fix missing null check in atombios_i2c.c
      drm/amd/powerplay: Fix buffer overflows with mc_reg_address
      drm/amd/powerplay: Followup fixes to mc_reg_address

Evan Quan (1):
      drm/amd/powerplay: describe the PCIE link speed in right GT/s

Feifei Xu (24):
      drm/amd/include:cleanup vega10 sdma0/1 header files.
      drm/amd/include:cleanup vega10 hdp header files.
      drm/amd/include:cleanup vega10 mp header files.
      drm/amd/include:cleanup vega10 athub header files.
      drm/amd/include:cleanup vega10 thm header files.
      drm/amd/include: cleanup vega10 umc header files.
      drm/amd/include:cleanup vega10 dce header files.
      drm/amd/include:cleanup vega10 uvd header files.
      drm/amd/include:cleanup vega10 vce header files.
      drm/amd/include:cleanup vega10 gc header files.
      drm/amd/include:cleanup vega10 mmhub header files.
      drm/amd/include:cleanup vega10 nbio header files.
      drm/amd/include:cleanup vega10 nbif header files.
      drm/amd/include:cleanup vega10 smuio header files.
      drm/amd/include:cleanup vega10 osssys header files.
      drm/amd/include:cleanup vega10 header files.
      drm/amd/include:cleanup raven1 sdma header files.
      drm/amd/include:cleanup raven1 dcn header files.
      drm/amd/include:cleanup raven1 gc header files.
      drm/amd/include:cleanup raven1 mmhub header files.
      drm/amd/include:cleanup raven1 mp header files.
      drm/amd/include:cleanup raven1 nbio header files.
      drm/amd/include:cleanup raven1 thm header files.
      drm/amd/include:cleanup raven1 vcn header files.

Frank Min (1):
      drm/amdgpu: correct vce4.0 fw config for SRIOV (V2)

Gustavo A. R. Silva (2):
      drm/amd/display/dc/core/dc_resource: use swap macro in rect_swap_helper
      drm/amd/display/dc/dce110/dce110_mem_input_v: use swap macro in program_size_and_rotation

Harry Wentland (17):
      drm/amd/display: Cleanup some fail labels in dcn10_resource
      drm/amd/display: Clean some unneeded defines from ddc_service_types.h
      drm/amd/display: Explicit casting for grph object ids
      drm/amd/display: Move conn_state to header
      amdgpu/dm: Remove fb_location form fill_plane_attributes
      drm/amd/display: Both timing_sync and multisync need stream_count > 1
      drm/amd/display: Bunch of indentation cleanups in color stuff
      drm/amd/display: Fix some more color indentations
      drm/amd/display: Remove extra arr_points element
      drm/amd/display: Bunch more color indentation cleanups
      drm/amd/display: Remove unused register read in program_pwl
      drm/amd/display: A few more color indentation changes
      drm/amd/display: Move dc_stream interface to separate header
      drm/amd/display: Move dc_link interface to separate header
      drm/amd/display: Remove unnecessary dc_stream vtable
      drm/amd/display: Fix Linux after optimize frontend programming
      drm/amd/display: Remove unnecessary dc_link vtable

Hawking Zhang (1):
      drm/amdgpu: switch to use new SOC15 reg read/write macros for soc15 ih

Hersen Wu (1):
      drm/amd/display: send display_count msg so SMU can enter S0i2

Horace Chen (1):
      drm/amdgpu: refine SR-IOV firmware VRAM reservation to protect data

Joe Perches (2):
      drm: amd: Fix line continuation formats
      drm/ttm: Use a static string instead of an array of char *

Ken Chalmers (1):
      drm/amd/display: fix dcn10_hubbub_wm_read_state

Leo (Sunpeng) Li (11):
      drm/amd/display: Cleanup code that enables freesync
      drm/amd/display: Only add stream to freesync when modeset required
      drm/amd/display: Fix styling of freesync code in commit_tail
      drm/amd/display: Complete TODO item: use new DRM iterator
      drm/amd/display: Remove dangling planes on dc commit state
      drm/amd/display: Change frontend/backend programming sequence
      drm/amd/display: Early return on stream programming failure
      drm/amd/display: Fix unused variable warning
      drm/amd/display: Fix use before initialize warning
      drm/amd/display: Trigger full update on plane change
      drm/amd/display: Do not program front-end twice

Michel Dänzer (9):
      amdgpu/dce: Use actual number of CRTCs and HPDs in set_irq_funcs
      drm/amd/display: Use real number of CRTCs and HPDs in set_irq_funcs
      amdgpu: Remove AMDGPU_{HPD,CRTC_IRQ,PAGEFLIP_IRQ}_LAST
      drm/amd/display: Remove fb_location parameter from get_fb_info
      amdgpu: Don't use DRM_ERROR when failing to allocate a BO
      drm/amdgpu: Downgrade DRM_ERROR to DRM_DEBUG in amdgpu_queue_mgr_map
      drm/amd/display: Fix description of module parameter dc_log
      drm/amd/display: Add dm_logger_append_va API
      drm/amd/display: Don't call dm_log_to_buffer directly in dc_conn_log

Mikita Lipski (2):
      drm/amd/display: Adding DCN1 registers
      drm/amd/display: Multi display synchronization logic

Monk Liu (26):
      drm/amdgpu:cleanup force_completion
      drm/amdgpu:add hang_limit for sched(v2)
      drm/amd/scheduler:introduce guilty pointer member
      drm/amdgpu:pass ctx->guilty address to entity init
      drm/amdgpu:skip job for guilty ctx in parser_init
      drm/amdgpu:cleanup job reset routine(v2)
      drm/amdgpu:don't change ctx->reset_couner upon query
      drm/amdgpu:implement ctx query2
      amd/scheduler:imple job skip feature(v3)
      drm/amdgpu:implement new GPU recover(v3)
      drm/amdgpu:cleanup in_sriov_reset and lock_reset
      drm/amdgpu:cleanup ucode_init_bo
      drm/amdgpu/sriov:fix memory leak in psp_load_fw
      drm/amdgpu:fix random missing of FLR NOTIFY
      drm/amdgpu:read VRAMLOST from gim
      drm/amdgpu:fix gpu recover missing skipping(v2)
      drm/amdgpu:cleanup stolen vga memory finish
      drm/amdgpu:cleanup GMC & gart garbage function
      drm/amdgpu:fix NULL pointer access during drv remove
      drm/amdgpu:cleanup unused stack var
      drm/amdgpu:free CSA in unified place
      drm/amdgpu:cleanup firmware.fw_buf alloc/free
      drm/amdgpu:show error message if fail on event4
      drm/amdgpu:fix virtual dce bug
      drm/amdgpu:cancel timer of virtual DCE(v2)
      drm/amdgpu:partially revert 1cfd8e237f0318e330190ac21d63c58ae6a1f66c

Noralf Trønnes (3):
      drm/amd/display: Use drm_fb_helper_poll_changed()
      drm/amdgpu: Use drm_fb_helper_lastclose() and _poll_changed()
      drm/radeon: Use drm_fb_helper_lastclose() and _poll_changed()

Piotr Redlewski (1):
      drm/amd/amdgpu: fix UVD mc offsets

Pixel Ding (1):
      drm/amdgpu: revise retry init to fully cleanup driver

Rex Zhu (8):
      drm/amdgpu: move DC and PP shared data structures to dm_pp_interface.h
      drm/amd/powerplay: move functions to amd_pm_funcs table
      drm/amdgpu: move struct amd_powerplay to amdgpu.h
      drm/amdgpu: add header kgd_pp_interface.h
      drm/amdgpu: add new pp function point notify_smu_memory_info
      drm/amd/pp: implement notify_smu_memory_info on Powerplay
      drm/amd/pp: delete an outdated comment in amd_powerplay.c
      drm/amdgpu: delete duplicated code.

Roger He (7):
      drm/amd/amdgpu: not allow gtt size exceed 75%*system memory size
      drm/ttm: use NUM_PAGES_TO_ALLOC always
      drm/ttm: add page order in page pool
      drm/ttm: add set_pages_wb for handling page order more than zero
      drm/ttm: add page order support in ttm_pages_put
      drm/ttm: roundup the shrink request to prevent skip huge pool
      drm/amd/amdgpu: set gtt size according to system memory size only

Roman Li (1):
      drm/amd/display: Fix unbalanced locking in surface apply

Shirish S (2):
      drm/amd/display: fix static checker warning
      drm/amd/display: remove usage of legacy_cursor_update

SivapiriyanKumarasamy (2):
      drm/amd/display: Apply VQ adjustments in MPO case
      drm/amd/display: Add transfer function to dc_surface_update

Tony Cheng (16):
      drm/amd/display: dal 3.1.08
      drm/amd/display: dal 3.1.09
      drm/amd/display: dal 3.1.10
      drm/amd/display: dal 3.1.11
      drm/amd/display: dal 3.1.12
      drm/amd/display: dal 3.1.13
      drm/amd/display: dal 3.1.14
      drm/amd/display: dal 3.1.15
      drm/amd/display: dal 3.1.16
      drm/amd/display: fix plane update prior to stream enablement
      drm/amd/display: remove stream_func vtable
      drm/amd/display: performance profiling instrumentation
      drm/amd/display: dal 3.1.17
      drm/amd/display: dal 3.1.18
      drm/amd/display: dal 3.1.19
      drm/amd/display: dal 3.1.20

Xiangliang.Yu (1):
      drm/amdgpu/gfx8: Fix compute ring failure after resetting

Yongqiang Sun (18):
      drm/amd/display: Move lock to front end program.
      drm/amd/display: Check cursor address before program.
      drm/amd/display: Set cursor position as per address.
      drm/amd/display: Power down front end in init_hw.
      drm/amd/display: Not reset front end when program back end.
      drm/amd/display: Added disconnect dchub.
      drm/amd/display: Enalbe blank data double buffer after mpc disconnected.
      drm/amd/display: Add tg_init interface.
      drm/amd/display: Refactor disable front end pipes.
      drm/amd/display: Modified front end initiail in init_hw
      drm/amd/display: Fixed not set scaler bug.
      drm/amd/display: Apply work around for stutter.
      drm/amd/display: Optimize programming front end
      drm/amd/display: Optimize front end programming.
      drm/amd/display: Move update_plane_addr to apply_ctx_for_surface for dce.
      drm/amd/display: Update dchub and dpp as per update flags.
      drm/amd/display: Only update output transfer function for full type.
      drm/amd/display: Only program watermark for full update.

Yue Hin Lau (14):
      drm/amd/display: cleaning up hubp for dcn
      drm/amd/display: create new files for hubbub functions
      drm/amd/display: create new structure for hubbub
      drm/amd/display: fix bug from last commit for hubbub
      drm/amd/display: create new function prototype update_dchub for dcn
      drm/amd/display: function renaming for hubbub
      drm/amd/display: hubbub function flipping true and false
      drm/amd/display: Only update dchub if hubbub is available
      drm/amd/display: call set csc_default if enable adjustment is false
      drm/amd/display: renaming dpp function to follow naming convention
      drm/amd/display: call set_mpc_output_csc from hwsequencer
      drm/amd/display: fix opp header register define
      drm/amd/display: update output csc matrix values
      drm/amd/display: move csc matrix to hw_shared

pding (11):
      drm/amdgpu: change redundant init logs to debug level
      drm/amdgpu: avoid soft lockup when waiting for RLC serdes (v2)
      drm/amdgpu/virt: add function to check MMIO (v2)
      drm/amdgpu/virt: add wait_reset virt ops
      drm/amdgpu/virt: implement wait_reset callbacks for vi/ai
      drm/amdgpu: retry init if it fails due to exclusive mode timeout (v3)
      drm/amdgpu: return error when sriov access requests get timeout
      drm/amdgpu: retry init if exclusive mode request is failed
      drm/amdkfd: initialise kfd inside amdgpu_device_init
      drm/amdgpu: release exclusive mode after hw_init
      drm/amdgpu: bypass FB resizing for SRIOV VF

 drivers/gpu/drm/amd/amdgpu/amdgpu.h                |    29 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c         |     2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c       |     8 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c            |     2 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c             |    62 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c            |    44 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c         |   530 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c        |     9 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h        |     6 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h            |     6 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c            |    14 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c             |    27 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c          |    47 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c           |    66 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h           |     4 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c            |    22 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c        |    59 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c             |     2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c            |     6 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c            |    52 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c            |    24 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h           |     7 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c         |    90 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h         |     2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c             |     1 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c            |    22 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c      |    10 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h           |     3 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c           |    22 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h           |     4 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c            |   174 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h            |     8 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c          |    45 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c            |    10 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h            |     4 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c            |   108 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c            |    19 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c           |    35 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h           |     9 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c             |   126 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h             |    21 +-
 drivers/gpu/drm/amd/amdgpu/atombios_i2c.c          |    11 +-
 drivers/gpu/drm/amd/amdgpu/ci_dpm.c                |    16 +-
 drivers/gpu/drm/amd/amdgpu/cik.c                   |    40 +-
 drivers/gpu/drm/amd/amdgpu/cik_sdma.c              |     4 +-
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c             |    20 +-
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c             |    22 +-
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c              |    12 +-
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c              |    12 +-
 drivers/gpu/drm/amd/amdgpu/dce_virtual.c           |    14 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c              |    24 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c              |    29 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c              |   100 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c              |    37 +-
 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c           |    10 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c              |    23 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c              |    29 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c              |    43 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c              |   275 +-
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c            |    15 +-
 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c              |    27 +-
 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c              |    26 +-
 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c             |    10 +-
 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c             |    10 +-
 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c             |     8 +-
 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c              |    12 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c             |     8 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c             |    24 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c             |    30 +-
 drivers/gpu/drm/amd/amdgpu/si.c                    |    34 +-
 drivers/gpu/drm/amd/amdgpu/si_dma.c                |     4 +-
 drivers/gpu/drm/amd/amdgpu/si_dpm.c                |    10 +-
 drivers/gpu/drm/amd/amdgpu/soc15.c                 |    28 +-
 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c              |     4 +-
 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c              |     4 +-
 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c              |    10 +-
 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c              |    30 +-
 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c              |    50 +-
 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c              |    12 +-
 drivers/gpu/drm/amd/amdgpu/vega10_ih.c             |    52 +-
 drivers/gpu/drm/amd/amdgpu/vi.c                    |    10 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c  |   279 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h  |    12 +
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c  |     9 +-
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_services.c |    33 +-
 .../gpu/drm/amd/display/dc/basics/log_helpers.c    |    10 +-
 drivers/gpu/drm/amd/display/dc/basics/logger.c     |    22 +-
 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c   |    87 +-
 drivers/gpu/drm/amd/display/dc/core/dc.c           |   574 +-
 drivers/gpu/drm/amd/display/dc/core/dc_debug.c     |     4 +
 drivers/gpu/drm/amd/display/dc/core/dc_link.c      |     4 +-
 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c   |    13 +-
 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c |    11 +-
 drivers/gpu/drm/amd/display/dc/core/dc_resource.c  |    52 +-
 drivers/gpu/drm/amd/display/dc/core/dc_stream.c    |    15 +-
 drivers/gpu/drm/amd/display/dc/dc.h                |   587 +-
 drivers/gpu/drm/amd/display/dc/dc_dp_types.h       |    28 +-
 drivers/gpu/drm/amd/display/dc/dc_helper.c         |     7 +-
 drivers/gpu/drm/amd/display/dc/dc_hw_types.h       |    25 +
 drivers/gpu/drm/amd/display/dc/dc_link.h           |   207 +
 drivers/gpu/drm/amd/display/dc/dc_stream.h         |   292 +
 drivers/gpu/drm/amd/display/dc/dc_types.h          |     5 -
 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c       |    32 +-
 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c      |   194 +-
 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h      |    12 +-
 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h     |     9 -
 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c       |    33 +-
 .../gpu/drm/amd/display/dc/dce/dce_link_encoder.c  |    34 +-
 .../gpu/drm/amd/display/dc/dce/dce_link_encoder.h  |     5 +-
 .../drm/amd/display/dc/dce/dce_stream_encoder.c    |    34 +-
 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c |   278 +-
 .../amd/display/dc/dce100/dce100_hw_sequencer.c    |     2 +
 .../amd/display/dc/dce110/dce110_hw_sequencer.c    |   327 +-
 .../amd/display/dc/dce110/dce110_hw_sequencer.h    |     4 +-
 .../drm/amd/display/dc/dce110/dce110_mem_input_v.c |    28 +-
 .../amd/display/dc/dce110/dce110_opp_regamma_v.c   |     2 +-
 .../drm/amd/display/dc/dce110/dce110_resource.c    |     1 +
 .../display/dc/dce110/dce110_timing_generator.c    |   265 +-
 .../display/dc/dce110/dce110_timing_generator.h    |     6 +
 .../amd/display/dc/dce120/dce120_hw_sequencer.c    |     6 +-
 .../drm/amd/display/dc/dce120/dce120_resource.c    |     8 +-
 .../display/dc/dce120/dce120_timing_generator.c    |     6 +-
 .../gpu/drm/amd/display/dc/dce80/dce80_resource.c  |     2 +
 drivers/gpu/drm/amd/display/dc/dcn10/Makefile      |     3 +-
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c   |   104 +-
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h   |    45 +-
 .../gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c    |   186 +-
 .../gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c  |     8 +
 .../gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c    |   516 +
 .../gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h    |   214 +
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c  |    25 +-
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h  |   345 +-
 .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c  |  1826 +-
 .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h  |     1 +
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c   |    11 +
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h   |     1 +
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c   |    52 +-
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h   |   102 +-
 .../gpu/drm/amd/display/dc/dcn10/dcn10_resource.c  |   120 +-
 .../amd/display/dc/dcn10/dcn10_timing_generator.c  |   122 +-
 .../amd/display/dc/dcn10/dcn10_timing_generator.h  |    35 +-
 drivers/gpu/drm/amd/display/dc/dm_services.h       |     7 +
 .../drm/amd/display/dc/dml/display_mode_structs.h  |     2 +-
 .../gpu/drm/amd/display/dc/dml/display_mode_vba.c  |   122 +-
 .../amd/display/dc/gpio/dce120/hw_factory_dce120.c |     6 +-
 .../display/dc/gpio/dce120/hw_translate_dce120.c   |     6 +-
 .../amd/display/dc/gpio/dcn10/hw_factory_dcn10.c   |     6 +-
 .../amd/display/dc/gpio/dcn10/hw_translate_dcn10.c |     6 +-
 .../amd/display/dc/i2caux/dce120/i2caux_dce120.c   |     6 +-
 .../drm/amd/display/dc/i2caux/dcn10/i2caux_dcn10.c |     6 +-
 drivers/gpu/drm/amd/display/dc/inc/core_types.h    |     1 +
 drivers/gpu/drm/amd/display/dc/inc/hw/abm.h        |    10 +
 drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h       |    20 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h        |    44 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h       |     5 +
 drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h  |    42 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h        |     6 +-
 .../gpu/drm/amd/display/dc/inc/hw/link_encoder.h   |     2 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h        |    18 +
 drivers/gpu/drm/amd/display/dc/inc/hw/opp.h        |    12 +
 .../drm/amd/display/dc/inc/hw/timing_generator.h   |    11 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/transform.h  |     6 +-
 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h  |    21 +-
 .../amd/display/dc/irq/dce120/irq_service_dce120.c |     6 +-
 .../amd/display/dc/irq/dcn10/irq_service_dcn10.c   |     6 +-
 .../amd/display/dc/virtual/virtual_link_encoder.c  |     3 +-
 .../drm/amd/display/include/ddc_service_types.h    |    33 -
 .../gpu/drm/amd/display/include/grph_object_id.h   |    12 +-
 .../gpu/drm/amd/display/include/logger_interface.h |     5 +
 .../drm/amd/display/modules/freesync/freesync.c    |    84 +-
 drivers/gpu/drm/amd/include/amd_shared.h           |   172 -
 .../amd/include/asic_reg/athub/athub_1_0_offset.h  |   453 +
 .../amd/include/asic_reg/athub/athub_1_0_sh_mask.h |  2045 ++
 .../asic_reg/{vega10/DC => dce}/dce_12_0_offset.h  |     0
 .../asic_reg/{vega10/DC => dce}/dce_12_0_sh_mask.h |     0
 .../asic_reg/{raven1/DCN => dcn}/dcn_1_0_offset.h  |     0
 .../asic_reg/{raven1/DCN => dcn}/dcn_1_0_sh_mask.h |     0
 .../asic_reg/{vega10/GC => gc}/gc_9_0_default.h    |     0
 .../asic_reg/{vega10/GC => gc}/gc_9_0_offset.h     |     0
 .../asic_reg/{vega10/GC => gc}/gc_9_0_sh_mask.h    |     0
 .../asic_reg/{raven1/GC => gc}/gc_9_1_offset.h     |     0
 .../drm/amd/include/asic_reg/hdp/hdp_4_0_offset.h  |   209 +
 .../drm/amd/include/asic_reg/hdp/hdp_4_0_sh_mask.h |   601 +
 .../{vega10/MMHUB => mmhub}/mmhub_1_0_default.h    |     0
 .../{vega10/MMHUB => mmhub}/mmhub_1_0_offset.h     |     0
 .../{vega10/MMHUB => mmhub}/mmhub_1_0_sh_mask.h    |     0
 .../{raven1/MMHUB => mmhub}/mmhub_9_1_offset.h     |     0
 .../{raven1/MMHUB => mmhub}/mmhub_9_1_sh_mask.h    |     0
 .../asic_reg/{raven1/MP => mp}/mp_10_0_default.h   |     0
 .../asic_reg/{raven1/MP => mp}/mp_10_0_offset.h    |     0
 .../asic_reg/{raven1/MP => mp}/mp_10_0_sh_mask.h   |     0
 .../drm/amd/include/asic_reg/mp/mp_9_0_offset.h    |   375 +
 .../drm/amd/include/asic_reg/mp/mp_9_0_sh_mask.h   |  1463 +
 .../{vega10/NBIF => nbif}/nbif_6_1_offset.h        |     0
 .../{vega10/NBIF => nbif}/nbif_6_1_sh_mask.h       |     0
 .../{vega10/NBIO => nbio}/nbio_6_1_default.h       |     0
 .../{vega10/NBIO => nbio}/nbio_6_1_offset.h        |     0
 .../{vega10/NBIO => nbio}/nbio_6_1_sh_mask.h       |     0
 .../{raven1/NBIO => nbio}/nbio_7_0_default.h       |     0
 .../{raven1/NBIO => nbio}/nbio_7_0_offset.h        |     0
 .../{raven1/NBIO => nbio}/nbio_7_0_sh_mask.h       |     0
 .../{vega10/OSSSYS => oss}/osssys_4_0_offset.h     |     0
 .../{vega10/OSSSYS => oss}/osssys_4_0_sh_mask.h    |     0
 .../include/asic_reg/raven1/DCN/dcn_1_0_default.h  |  7988 -----
 .../include/asic_reg/raven1/GC/gc_9_1_default.h    |  4005 ---
 .../include/asic_reg/raven1/GC/gc_9_1_sh_mask.h    | 31191 -------------------
 .../asic_reg/raven1/MMHUB/mmhub_9_1_default.h      |  1028 -
 .../asic_reg/raven1/SDMA0/sdma0_4_1_sh_mask.h      |  1658 -
 .../include/asic_reg/raven1/VCN/vcn_1_0_default.h  |   202 -
 .../amd/include/asic_reg/sdma0/sdma0_4_0_default.h |   286 +
 .../amd/include/asic_reg/sdma0/sdma0_4_0_offset.h  |   547 +
 .../amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h |  1852 ++
 .../{raven1/SDMA0 => sdma0}/sdma0_4_1_default.h    |     0
 .../{raven1/SDMA0 => sdma0}/sdma0_4_1_offset.h     |     0
 .../amd/include/asic_reg/sdma1/sdma1_4_0_default.h |   282 +
 .../amd/include/asic_reg/sdma1/sdma1_4_0_offset.h  |   539 +
 .../amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h |  1810 ++
 .../{vega10/SMUIO => smuio}/smuio_9_0_offset.h     |     0
 .../{vega10/SMUIO => smuio}/smuio_9_0_sh_mask.h    |     0
 .../{raven1/THM => thm}/thm_10_0_default.h         |     0
 .../asic_reg/{raven1/THM => thm}/thm_10_0_offset.h |     0
 .../{raven1/THM => thm}/thm_10_0_sh_mask.h         |     0
 .../asic_reg/{vega10/THM => thm}/thm_9_0_default.h |     0
 .../asic_reg/{vega10/THM => thm}/thm_9_0_offset.h  |     0
 .../asic_reg/{vega10/THM => thm}/thm_9_0_sh_mask.h |     0
 .../drm/amd/include/asic_reg/umc/umc_6_0_default.h |    31 +
 .../drm/amd/include/asic_reg/umc/umc_6_0_offset.h  |    52 +
 .../drm/amd/include/asic_reg/umc/umc_6_0_sh_mask.h |    36 +
 .../asic_reg/{vega10/UVD => uvd}/uvd_7_0_offset.h  |     0
 .../asic_reg/{vega10/UVD => uvd}/uvd_7_0_sh_mask.h |     0
 .../asic_reg/{vega10/VCE => vce}/vce_4_0_default.h |     0
 .../asic_reg/{vega10/VCE => vce}/vce_4_0_offset.h  |     0
 .../asic_reg/{vega10/VCE => vce}/vce_4_0_sh_mask.h |     0
 .../asic_reg/{raven1/VCN => vcn}/vcn_1_0_offset.h  |     0
 .../asic_reg/{raven1/VCN => vcn}/vcn_1_0_sh_mask.h |     0
 .../asic_reg/vega10/ATHUB/athub_1_0_default.h      |   241 -
 .../asic_reg/vega10/ATHUB/athub_1_0_offset.h       |   453 -
 .../asic_reg/vega10/ATHUB/athub_1_0_sh_mask.h      |  2045 --
 .../include/asic_reg/vega10/DC/dce_12_0_default.h  |  9868 ------
 .../include/asic_reg/vega10/HDP/hdp_4_0_default.h  |   117 -
 .../include/asic_reg/vega10/HDP/hdp_4_0_offset.h   |   209 -
 .../include/asic_reg/vega10/HDP/hdp_4_0_sh_mask.h  |   601 -
 .../include/asic_reg/vega10/MP/mp_9_0_default.h    |   342 -
 .../amd/include/asic_reg/vega10/MP/mp_9_0_offset.h |   375 -
 .../include/asic_reg/vega10/MP/mp_9_0_sh_mask.h    |  1463 -
 .../asic_reg/vega10/NBIF/nbif_6_1_default.h        |  1271 -
 .../asic_reg/vega10/OSSSYS/osssys_4_0_default.h    |   176 -
 .../asic_reg/vega10/SDMA0/sdma0_4_0_default.h      |   286 -
 .../asic_reg/vega10/SDMA0/sdma0_4_0_offset.h       |   547 -
 .../asic_reg/vega10/SDMA0/sdma0_4_0_sh_mask.h      |  1852 --
 .../asic_reg/vega10/SDMA1/sdma1_4_0_default.h      |   282 -
 .../asic_reg/vega10/SDMA1/sdma1_4_0_offset.h       |   539 -
 .../asic_reg/vega10/SDMA1/sdma1_4_0_sh_mask.h      |  1810 --
 .../asic_reg/vega10/SMUIO/smuio_9_0_default.h      |   100 -
 .../include/asic_reg/vega10/UVD/uvd_7_0_default.h  |   127 -
 drivers/gpu/drm/amd/include/dm_pp_interface.h      |   144 +
 drivers/gpu/drm/amd/include/kgd_pp_interface.h     |   294 +
 .../amd/include/{asic_reg/vega10 => }/soc15ip.h    |     0
 .../include/{asic_reg/vega10 => }/vega10_enum.h    |     0
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c      |   158 +-
 .../gpu/drm/amd/powerplay/hwmgr/pp_overdriver.h    |     2 +-
 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c |     2 +-
 .../amd/powerplay/hwmgr/process_pptables_v1_0.c    |     6 +-
 .../gpu/drm/amd/powerplay/hwmgr/processpptables.c  |     6 +-
 drivers/gpu/drm/amd/powerplay/hwmgr/rv_inc.h       |    18 +-
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c   |     6 +-
 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c |    33 +-
 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_inc.h   |    23 +-
 drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h  |   275 +-
 drivers/gpu/drm/amd/powerplay/inc/pp_soc15.h       |     2 +-
 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c   |    18 +-
 .../gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c  |    21 +-
 .../gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c    |    10 +-
 .../gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c   |     6 +-
 drivers/gpu/drm/amd/scheduler/gpu_sched_trace.h    |     9 +-
 drivers/gpu/drm/amd/scheduler/gpu_scheduler.c      |   134 +-
 drivers/gpu/drm/amd/scheduler/gpu_scheduler.h      |    51 +-
 drivers/gpu/drm/amd/scheduler/spsc_queue.h         |   121 +
 drivers/gpu/drm/ast/ast_ttm.c                      |     9 +-
 drivers/gpu/drm/bochs/bochs_mm.c                   |     6 +-
 drivers/gpu/drm/cirrus/cirrus_ttm.c                |     6 +-
 drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c        |     6 +-
 drivers/gpu/drm/mgag200/mgag200_ttm.c              |     9 +-
 drivers/gpu/drm/nouveau/nouveau_bo.c               |    37 +-
 drivers/gpu/drm/nouveau/nouveau_gem.c              |     2 +-
 drivers/gpu/drm/qxl/qxl_ioctl.c                    |     4 +-
 drivers/gpu/drm/qxl/qxl_object.c                   |     6 +-
 drivers/gpu/drm/qxl/qxl_release.c                  |     6 +-
 drivers/gpu/drm/qxl/qxl_ttm.c                      |     9 +-
 drivers/gpu/drm/radeon/radeon_display.c            |     9 +-
 drivers/gpu/drm/radeon/radeon_fb.c                 |    22 -
 drivers/gpu/drm/radeon/radeon_gem.c                |     3 +-
 drivers/gpu/drm/radeon/radeon_kms.c                |     5 +-
 drivers/gpu/drm/radeon/radeon_mn.c                 |     3 +-
 drivers/gpu/drm/radeon/radeon_mode.h               |     3 -
 drivers/gpu/drm/radeon/radeon_object.c             |    14 +-
 drivers/gpu/drm/radeon/radeon_ttm.c                |    31 +-
 drivers/gpu/drm/radeon/radeon_vm.c                 |     3 +-
 drivers/gpu/drm/ttm/ttm_bo.c                       |   263 +-
 drivers/gpu/drm/ttm/ttm_execbuf_util.c             |     8 +-
 drivers/gpu/drm/ttm/ttm_page_alloc.c               |    98 +-
 drivers/gpu/drm/ttm/ttm_page_alloc_dma.c           |     5 +-
 drivers/gpu/drm/virtio/virtgpu_ioctl.c             |    11 +-
 drivers/gpu/drm/virtio/virtgpu_ttm.c               |     7 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c            |     3 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c             |    21 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c            |     9 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_resource.c           |     6 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_shader.c             |     3 +-
 drivers/staging/vboxvideo/vbox_ttm.c               |    17 +-
 include/drm/ttm/ttm_bo_api.h                       |   152 +-
 include/drm/ttm/ttm_bo_driver.h                    |   150 +-
 include/uapi/drm/amdgpu_drm.h                      |    12 +
 313 files changed, 17889 insertions(+), 74611 deletions(-)
 mode change 100644 => 100755 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dc_link.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dc_stream.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/athub/athub_1_0_offset.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/athub/athub_1_0_sh_mask.h
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/DC => dce}/dce_12_0_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/DC => dce}/dce_12_0_sh_mask.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/DCN => dcn}/dcn_1_0_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/DCN => dcn}/dcn_1_0_sh_mask.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/GC => gc}/gc_9_0_default.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/GC => gc}/gc_9_0_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/GC => gc}/gc_9_0_sh_mask.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/GC => gc}/gc_9_1_offset.h (100%)
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_4_0_offset.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_4_0_sh_mask.h
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/MMHUB => mmhub}/mmhub_1_0_default.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/MMHUB => mmhub}/mmhub_1_0_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/MMHUB => mmhub}/mmhub_1_0_sh_mask.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/MMHUB => mmhub}/mmhub_9_1_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/MMHUB => mmhub}/mmhub_9_1_sh_mask.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/MP => mp}/mp_10_0_default.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/MP => mp}/mp_10_0_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/MP => mp}/mp_10_0_sh_mask.h (100%)
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_sh_mask.h
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/NBIF => nbif}/nbif_6_1_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/NBIF => nbif}/nbif_6_1_sh_mask.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/NBIO => nbio}/nbio_6_1_default.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/NBIO => nbio}/nbio_6_1_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/NBIO => nbio}/nbio_6_1_sh_mask.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/NBIO => nbio}/nbio_7_0_default.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/NBIO => nbio}/nbio_7_0_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/NBIO => nbio}/nbio_7_0_sh_mask.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/OSSSYS => oss}/osssys_4_0_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/OSSSYS => oss}/osssys_4_0_sh_mask.h (100%)
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_default.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/GC/gc_9_1_default.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/GC/gc_9_1_sh_mask.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/MMHUB/mmhub_9_1_default.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/SDMA0/sdma0_4_1_sh_mask.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/VCN/vcn_1_0_default.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_default.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/SDMA0 => sdma0}/sdma0_4_1_default.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/SDMA0 => sdma0}/sdma0_4_1_offset.h (100%)
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_default.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/SMUIO => smuio}/smuio_9_0_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/SMUIO => smuio}/smuio_9_0_sh_mask.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/THM => thm}/thm_10_0_default.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/THM => thm}/thm_10_0_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/THM => thm}/thm_10_0_sh_mask.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/THM => thm}/thm_9_0_default.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/THM => thm}/thm_9_0_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/THM => thm}/thm_9_0_sh_mask.h (100%)
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_0_default.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_0_offset.h
 create mode 100644 drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_0_sh_mask.h
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/UVD => uvd}/uvd_7_0_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/UVD => uvd}/uvd_7_0_sh_mask.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/VCE => vce}/vce_4_0_default.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/VCE => vce}/vce_4_0_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{vega10/VCE => vce}/vce_4_0_sh_mask.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/VCN => vcn}/vcn_1_0_offset.h (100%)
 rename drivers/gpu/drm/amd/include/asic_reg/{raven1/VCN => vcn}/vcn_1_0_sh_mask.h (100%)
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/ATHUB/athub_1_0_default.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/ATHUB/athub_1_0_offset.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/ATHUB/athub_1_0_sh_mask.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/DC/dce_12_0_default.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/HDP/hdp_4_0_default.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/HDP/hdp_4_0_offset.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/HDP/hdp_4_0_sh_mask.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/MP/mp_9_0_default.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/MP/mp_9_0_offset.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/MP/mp_9_0_sh_mask.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/NBIF/nbif_6_1_default.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/OSSSYS/osssys_4_0_default.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/SDMA0/sdma0_4_0_default.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/SDMA0/sdma0_4_0_offset.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/SDMA0/sdma0_4_0_sh_mask.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/SDMA1/sdma1_4_0_default.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/SDMA1/sdma1_4_0_offset.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/SDMA1/sdma1_4_0_sh_mask.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/SMUIO/smuio_9_0_default.h
 delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vega10/UVD/uvd_7_0_default.h
 create mode 100644 drivers/gpu/drm/amd/include/kgd_pp_interface.h
 rename drivers/gpu/drm/amd/include/{asic_reg/vega10 => }/soc15ip.h (100%)
 rename drivers/gpu/drm/amd/include/{asic_reg/vega10 => }/vega10_enum.h (100%)
 create mode 100644 drivers/gpu/drm/amd/scheduler/spsc_queue.h


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