[PATCH] drm/amdgpu: setup the shared and private apertures on gfx9

[Alex Deucher]

On Fri, Dec 8, 2017 at 3:10 PM, Alex Deucher <alexdeucher at gmail.com> wrote:
> Same as previous asics.  This was not yet set for gfx9.

Ping?

>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 17 ++++++++++++-----
>  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c |  8 ++++++++
>  2 files changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 3fd13b77e71e..7564f87b084e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1529,11 +1529,18 @@ static void gfx_v9_0_gpu_init(struct amdgpu_device *adev)
>         for (i = 0; i < 16; i++) {
>                 soc15_grbm_select(adev, 0, 0, 0, i);
>                 /* CP and shaders */
> -               tmp = 0;
> -               tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, ALIGNMENT_MODE,
> -                                   SH_MEM_ALIGNMENT_MODE_UNALIGNED);
> -               WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, tmp);
> -               WREG32_SOC15(GC, 0, mmSH_MEM_BASES, 0);
> +               if (i == 0) {
> +                       tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE,
> +                                           SH_MEM_ALIGNMENT_MODE_UNALIGNED);
> +                       WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, tmp);
> +                       WREG32_SOC15(GC, 0, mmSH_MEM_BASES, 0);
> +               } else {
> +                       tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE,
> +                                           SH_MEM_ALIGNMENT_MODE_UNALIGNED);
> +                       WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, tmp);
> +                       tmp = adev->mc.shared_aperture_start >> 48;
> +                       WREG32_SOC15(GC, 0, mmSH_MEM_BASES, tmp);
> +               }
>         }
>         soc15_grbm_select(adev, 0, 0, 0, 0);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 695e0eada1cd..dbfb746a390c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -497,6 +497,14 @@ static int gmc_v9_0_early_init(void *handle)
>         gmc_v9_0_set_gart_funcs(adev);
>         gmc_v9_0_set_irq_funcs(adev);
>
> +       adev->mc.shared_aperture_start = 0x2000000000000000ULL;
> +       adev->mc.shared_aperture_end =
> +               adev->mc.shared_aperture_start + (4ULL << 30) - 1;
> +       adev->mc.private_aperture_start =
> +               adev->mc.shared_aperture_end + 1;
> +       adev->mc.private_aperture_end =
> +               adev->mc.private_aperture_start + (4ULL << 30) - 1;
> +
>         return 0;
>  }
>
> --
> 2.13.6
>