[PATCH 2/2] drm/amdgpu: use defines for mmBIF_IOV_FUNC_IDENTIFIER fields

[Yu, Xiangliang]

Reviewed-by: Xiangliang Yu <Xiangliang.Yu at amd.com>


> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
> Of Alex Deucher
> Sent: Tuesday, December 19, 2017 11:07 PM
> To: amd-gfx at lists.freedesktop.org
> Cc: Deucher, Alexander <Alexander.Deucher at amd.com>
> Subject: [PATCH 2/2] drm/amdgpu: use defines for
> mmBIF_IOV_FUNC_IDENTIFIER fields
> 
> Rather than magic numbers.
> 
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/vi.c | 7 +++----
>  1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c
> b/drivers/gpu/drm/amd/amdgpu/vi.c index c59b37365e4d..da2b99c2d95f
> 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vi.c
> @@ -455,11 +455,10 @@ static void vi_detect_hw_virtualization(struct
> amdgpu_device *adev)
>  	    adev->asic_type == CHIP_FIJI) {
>  	       reg = RREG32(mmBIF_IOV_FUNC_IDENTIFIER);
>  	       /* bit0: 0 means pf and 1 means vf */
> -	       /* bit31: 0 means disable IOV and 1 means enable */
> -	       if (reg & 1)
> +	       if (REG_GET_FIELD(reg, BIF_IOV_FUNC_IDENTIFIER,
> +FUNC_IDENTIFIER))
>  		       adev->virt.caps |= AMDGPU_SRIOV_CAPS_IS_VF;
> -
> -	       if (reg & 0x80000000)
> +	       /* bit31: 0 means disable IOV and 1 means enable */
> +	       if (REG_GET_FIELD(reg, BIF_IOV_FUNC_IDENTIFIER,
> IOV_ENABLE))
>  		       adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV;
>  	}
> 
> --
> 2.13.6
> 
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